PWM溢出中断

嘿，Abhijit，
你能告诉我们你希望中断什么事件吗？
是否需要中断终端计数或比较1事件？根据您的要求，您可以选择其中任何一个。它可以在高级选项卡中看到，如下所示。
在主体（）中，别忘了取消CyGalalActuable。否则中断将永远不会被触发。
在ISR.C中，包括pWM0.h和所有其他的头文件，这些文件将在ISR向量中使用。这些应该写在“开始”和“结束”语句内。这里也可以声明任何其他变量。如果在主语中使用，则使用关键字“Extn”。
在CysISR（）函数中读取状态寄存器以清除中断位，因为它是粘性的。然后你可以根据你的逻辑设置变量。
这会打断你的工作。让我们知道这是否有帮助。



     以下为原文
  Hey Abhijit,
     
    Can you please tell us on what event you want an Interrupt to be triggered?
    Whether you want Interrupt on Terminal Count or on Compare 1 Event? According to your requirement, you can choose any of these. It can be seen in the Advanced tab as shown below.
     
     
     
     
    In main( ), don't forget to uncomment the CYGlobalIntEnable. Else Interrupt will never be triggered.
     
    In the isr.c, include the PWM0.h and all other header files which you'll be using in the ISR vector. These should be written inside the #START and #END statements. Any other variables can also be declared here. If they are used in main too, then use the keyword "extern".
     
   
     
     
    In the CY_ISR( ) function read the status register to clear the interrupt bit as it is sticky. Then you can set variables according to your logic.
     
     
   
     
     
    This can get your Interrupt to working. Let us know if this helps.

哦，当当！IIS缺少全局中断使能语句……“四倍体”。现在开始工作。
BTW在缺省生成的主体（）中不存在。如果有中断的组件的数据表提到这将是一个好主意…
谢谢！
阿布希特



     以下为原文
  Oh dang! I was missing just the global interrupt enable statement... "CYGlobalIntEnable". Working now.
    BTW It was not there in the default generated main(). It'd be a good idea if the datasheets for the components with interrupts mentioned this...
    Thanks!
    ~Abhijit

您好!
我觉得有很多小事需要添加到数据表中，例如，没有数据表提到PWM0YRealStaseRebug Stor（）必须被调用以使PWM中断下次准备就绪。在ISR的数据表中只有一个模糊的参考——
“一些中断源也需要用适当的块API（GPIO，UART，…）来清除，或者它们只会重新中断中断。进入ISR将清除一些中断源的未决位。
@赛普里斯人-我认为需要一些努力，使数据表更全面，涵盖所有这些小金块的信息！
谢谢，



     以下为原文
  Hi
    I feel that a lot of small things need to be added to the datasheet; for example NONE of the datasheets mention that PWM0_ReadStatusRegister(); must be called to get the PWM interrupt ready for the next time. In the datasheet for the ISR there is but one vague reference -
    "Some interrupt sources will also need to be cleared with the appropriate block API (GPIO, UART, …) or they will just re-pend the interrupt. Entering the ISR will clear the pending bit for some interrupt sources."
    @Cypress folks - I believe some effort is needed to make datasheets a bit more comprehensive in covering all these small nuggets of info!
    Thanks,

嗨，Abhijit，
非常感谢你的反馈。
在组件数据表中，而不是在设备数据表中使用“RealSturtReistRever（）”来清除中断。
“中断输出是可能中断源组的逻辑或”。这个信号将高，而任何启用中断源是真实的。中断输出应保持断言，直到状态寄存器被软件读出。为了接收随后的中断，中断应该通过使用PWMLRead StaseRealStices（）API读取状态寄存器来清除。如果没有设置使用中断参数，中断输出是不可见的。这允许状态寄存器在必要时被移除以进行资源优化。



     以下为原文
  Hi Abhijit,
     
    Thank you very much for the feedback.
    The use of 'ReadStatus Register( )' to clear interrupts is mentioned in the Component datasheet rather than in device datasheet.
    "The interrupt output is the logical OR of the group of possible interrupt sources. This
signal will go high while any of the enabled interrupt sources are true. The interrupt output
shall remain asserted until the Status Register is read out by the software. In order to
receive subsequent interrupts, the interrupt shall be cleared by reading the Status
Register using the PWM_ReadStatusRegister() API. The interrupt output is not visible if
the Use Interrupt parameter is not set. This allows the status register to be removed for
resource optimization as necessary."