怎么使用LVDS IO引脚作为1位ADC？

我有ML505评估板，我想尝试将LVDS IO模块中的比较器用作1位ADC。
例如，我将一个0 V  -  1.5 V的模拟输入连接到SMA J10（SMA_DIFF_CLK_IN_P）和一个参考电压（可能是0.75 V）连接到SMA J11（SMA_DIFF_CLK_IN_N）。
参考电压可以从外部提供，或者我可以使用FPGA的单端输出并驱动RC电路以动态控制参考电压。
从表9中的ds202.pdf，LVDS_25的差分输入电压为100 mV至600 mV。
对于上面的例子，差分电压为750 mV，共模电压也会变化。
这会工作吗？
谢谢。



以下为原文

I have the ML505 eval board and I want to try to use the comparator in the LVDS IO block as a 1-bit ADC. For example, I'll connect an analog input of 0 V - 1.5 V to SMA J10 (SMA_DIFF_CLK_IN_P) and a reference voltage (maybe 0.75 V) to SMA J11 (SMA_DIFF_CLK_IN_N). The reference voltage could be supplied externally or I could use a single-ended output from the FPGA and drive an RC circuit in order to control the reference dynamically.

From Table 9 from ds202.pdf, the differential input voltage for LVDS_25 is from 100 mV to 600 mV. For the above example, the differential voltage would be 750 mV and the common-mode voltage would vary.

Would this even work?

Thanks.