GPIO中断定时描述配置？

你好，
谁能帮我找到GPIO中断定时描述配置？
枚举类型的声明cyu3pgpiointrmode_t { cy_u3p_gpio_no_intr = 0，/ * * / cy_u3p_gpio_intr_pos_edge没有中断触发，/*中断触发输入的上升沿。* / / * cy_u3p_gpio_intr_neg_edge，中断触发输入负的边缘。* / / * cy_u3p_gpio_intr_both_edge，中断触发边缘的输入。* / / * cy_u3p_gpio_intr_low_level，中断触发输入低电平。* / / * cy_u3p_gpio_intr_high_level，中断触发输入高电平。* / / * cy_u3p_gpio_intr_timer_thres，中断时触发定时器入门。仅适用于复杂的GPIO引脚。* / / * cy_u3p_gpio_intr_timer_zero中断时触发计时器达到零。仅适用于复杂的GPIO引脚。*/} CYU3PGPIONETMODEDET；
一个信号要多久，一个中断执行的情况下低/高？
需要多长时间如果我用积极的边缘到边缘的检测？
谢谢，
隆皮



     以下为原文
  Hello,
    can someone help me to find timing description for the GPIO interrupt configurations?
     
    typedef enum CyU3PGpioIntrMode_t
{
     CY_U3P_GPIO_NO_INTR = 0,        /* No Interrupt is triggered*/
     CY_U3P_GPIO_INTR_POS_EDGE,      /* Interrupt is triggered for positive edge of input. */
     CY_U3P_GPIO_INTR_NEG_EDGE,      /* Interrupt is triggered for negative edge of input. */
     CY_U3P_GPIO_INTR_BOTH_EDGE,     /* Interrupt is triggered for both edge of input. */
     CY_U3P_GPIO_INTR_LOW_LEVEL,     /* Interrupt is triggered for Low level of input. */
     CY_U3P_GPIO_INTR_HIGH_LEVEL,    /* Interrupt is triggered for High level of input. */
     CY_U3P_GPIO_INTR_TIMER_THRES,   /* Interrupt is triggered when the timer crosses the
                                        threshold. Valid only for complex GPIO pin. */
     CY_U3P_GPIO_INTR_TIMER_ZERO     /* Interrupt is triggered when the timer reaches zero.
                                        Valid only for complex GPIO pin. */
} CyU3PGpioIntrMode_t;
  
    How long has a signal to be, that a interrupt is executed in case of low-/, high-level?
    How long does it take if I use positive edge till the edge is detected?
    Thanks,
    lumpi