FX3：快速中断定时器怎么实现

你好，
在将硬件引脚设置为所需的逻辑电平之前，CYU3PGPIOStValueValo（）API已经有一些延迟。而不是使用这个API，你可以参考KBA 90267，它将指导你如何直接通过寄存器设置GPIO引脚：
在EZ-USB®FX3μ-KBA90267中增加比特敲击GPIO时钟的频率
请试试看，再确认一下。
感谢和问候
阿比纳夫



     以下为原文
  Hi,
 
CyU3PGpioSetValue() API already has some delay before setting the hardware pin to the desired logic level. Instead of using this API you can refer to the KBA 90267 which will guide you how to set GPIO pins through registers directly:
 
Increasing Frequency of Bit-Banged GPIO Clock in EZ-USB® FX3™ - KBA90267
 
Please try this and confirm.
 
Thanks & Regards
Abhinav

嗨，Abhinav，
我已与登记访问你建议实现GPIO的切换。这是减少延迟-但是我真的尽力减少抖动。
我相信这种抖动源是其他中断的系统上运行。为此我要实现GPIO块作为FIQ中断。它不像FIQ处理程序已为SDK定义。如Cyu3VeCursS.Gcc.S.
全局γ-CYU3PFIQHANDER
Y-Y-CYU3PFIQHANDER：
B-Y-CYU3PFIQHANDER
我已经开始写汇编代码完成FIQ中断处理程序，如下：
全局γ-CYU3PFIQHANDER
Y-Y-CYU3PFIQHANDER：
STMDB SP！，{R0－R3}
RS0
亚LR，LR，α4
STMDB SP！，{R0，R10，R12，LR}
BL CYU3PFIQ保存
LDR R1，= CyuU3PyVixAddisS地址
MOV R2，α0
STR R2，[R1]
LDR R1，= CyuU3PyVixItIn CythLoad地址
LDR R2，= CyuU3PyVixGPIOIMAGE掩膜
STR R2，[R1]
/*“BL Cyu3PrimqnestIn开始*//*！不确定是否需要FIQ。我找不到一个等价的FIQ函数*/
BL CYU3PGPIOC
/*“BL Cyu3PrimqNestStutt*//*！不确定是否需要FIQ。我找不到一个等价的FIQ函数*/
LDR R1，= CyuU3PyVixInEnabable地址
LDR R2，= CyuU3PyVixGPIOIMAGE掩膜
STR R2，[R1]
CYU3PFIQTraceStur蓄
将GPIO块设置为FIQ：
UVTIN 32×T*VixItIn选择StP＝（（UVTIN 32×T*）（0xFFFFF00 C））；
UVTIN 32×T*VixInEnEnable P=（（UVTIN 32×T*）（0xFFFFF10 10））；
UVTIN 32×T*VixItIn Celmithp＝（（UVTIN 32×T*）（0xFFFFF1414））；
/*禁用GPIO中断*/
* VixItIn Celmithp＝VixGPIOH面具；
/*设置为FIQ中断*/
* VixIntIn SpultTyp＝VixGPIOH掩码；
/*启用GPIO中断*/
* VixIntInAbEnLeLp p＝VixGPIOH掩码；
我能在这里得到一些帮助吗？在FX3上设置FIQ还有什么关系？
当做，



     以下为原文
  Hi Abhinav,
 
I have implemented the gpio toggle with the register access as you suggested. This does reduce latency - however I'm really trying to reduce the jitter.
 
I believe the source of this jitter is other interrupts which are running on the system. For this reason I want to implement the GPIO Block interrupt as an FIQ. It doesnt look like the FIQ handler has been defined for the SDK. As shown in cyu3vectors_gcc.S:
 
.global __CyU3PFiqHandler
__CyU3PFiqHandler:
     b   __CyU3PFiqHandler
 
 
I have started to write the assembly code to complete the FIQ interrupt handler, as follows:
 
.global __CyU3PFiqHandler
__CyU3PFiqHandler:
    stmdb   sp!, {r0-r3}                                
    mrs     r0, SPSR                                                         
    sub     lr, lr, #4                                                                
    stmdb   sp!, {r0, r10, r12, lr}                            
    bl      CyU3PFiqContextSave                              
                                                                                                               
    ldr     r1, =CY_U3P_VIC_ADDRESS_ADDRESS       
    mov     r2, #0                                                             
    str     r2, [r1]                                                  
    ldr     r1, =CY_U3P_VIC_INT_CLEAR_ADDRESS      
    ldr     r2, =CY_U3P_VIC_GPIO_MASK            
    str     r2, [r1]                                                     
                                                                                                               
    /*"bl      CyU3PIrqNestingStart*/           /* !!Not sure if needed for FIQ. I cant find an equivalent FIQ function */                     
    bl      CyU3PGpioCoreIntHandler                                
    /*"bl      CyU3PIrqNestingStop*/           /* !!Not sure if needed for FIQ. I cant find an equivalent FIQ function */                  
                                                                                                               
    ldr     r1, =CY_U3P_VIC_INT_ENABLE_ADDRESS  
    ldr     r2, =CY_U3P_VIC_GPIO_MASK                  
    str     r2, [r1]                                    
    b       CyU3PFiqContextRestore            
 
Setting the GPIO block as FIQ:
   uvint32_t *vic_int_select_p = ((uvint32_t *)(0xfffff00c));
   uvint32_t *vic_int_enable_p = ((uvint32_t *)(0xfffff0010));
   uvint32_t *vic_int_clear_p = ((uvint32_t *)(0xfffff0014));
   /* Disable GPIO Interrupt */
   *vic_int_clear_p = VIC_GPIO_MASK;
   /* Set as FIQ Interrupt */
   *vic_int_select_p = VIC_GPIO_MASK;
   /* Enable GPIO Interrupt */
   *vic_int_enable_p = VIC_GPIO_MASK;
 
 
Can I get some assistance here. What else is involved with setting up an FIQ on the FX3?
 
 
Regards,

你好，
目前，FX3固件的当前实现不处理FiqId中断。你可以在GPIO产生PWM波。请参阅FX3 TRM的第87.4.3节。
感谢和问候
阿比纳夫



     以下为原文
  Hi,
 
Right now current implementation of FX3 firmware doesn't handle FIQ_Interrupt. You can generate PWM wave at GPIO. Refer to the section 8.9.4.3 of FX3 TRM.
 
Thanks & Regards
Abhinav