怎么在vhdl中实现Bit-Spit aho corasick算法

嗨，
我希望您对数字设计和一些VHDL知识有一个很好的了解。
当你要求在RAM中实现FSM时，基本答案是肯定的，但你可能会考虑为字符匹配“生成”FSM。
所以你可能想要更新FSM的分支逻辑。
通过使用FPGA RAM（分布式或块RAM）的双端口功能，可以最简单地完成此操作。
复杂的是创建一个生成新硬件的硬件。
这可能变得如此复杂，以至于使用普通CPU会更有效率。
尝试了解算法的步骤，并找出如何将它们转换为硬件。
对于某些算法，这很容易，而其他一些算法几乎与硬件解决方案不兼容。
有没有办法限制要求？
例如
使用常量字典或减少可能的搜索模式数量？
有一个很好的综合 
Eilert



以下为原文

Hi ,
I hope you have a good general understanding of digital design and some VHDL knowledge as well.
 
When you ask for implementing a FSM in RAM the basic answer is YES, but you probably think about "generating" the FSM for the character matching. So you probably want to update the branch logic of the FSM. This can be done most simple by using the dual port capabilities of the FPGA RAMs (either distributed or block RAM). The complicated thing will be to create a hardware that generates a new hardware. This may become so complex that the use of an ordinary CPU would be more efficient.
Try to understand the steps of the algorithm and work out how they can be transformed into hardware. For some algorithms this is easy, and some others are almost incompatible to a hardware solution.
Is there a way to limit the requirements? e.g. use a constant dictionary or reduce the number of possible search patterns?
 
Have a nice synthesis
  Eilert