Microchip PIC SPI不兼容wrt slave select

我刚刚开始使用PIC24EP256MC202选择标准的一个重要部分，因为它有一个16位能力的SPI接口来驱动外部DAC。如果您检查两个公认的行业标准（例如Wiki）或一个常见的SPI DAC（例如Microchip MCP421）的数据表。在整个SPI传输过程中，发现从属选择应该是活动的。然而，微芯片是不兼容的，因为主模式中的从属选择仅在一个时钟周期内激活。什么样的基础上，当这些芯片功能不正常时，将它们作为SPI接口销售？对于软件不需要等待循环的问题，你有什么样的工作？为什么这个问题在硅勘误表中没有处理？附加的范围镜头显示了16位数据帧0x200 F的从属选择，时钟速度为1.25MHZEDIT，工作……绝不使用框架模式（SPIXCON2，FRMEN），试图得到SS信号，因为这导致时钟连续运行！当FRME被清除时，时钟只在事务持续时间内输出。这允许从使用普通IO引脚的软件驱动从属选择线，在将数据写入SPI缓冲器之前将其设置为真，并将其返回到假的某个合适的时间，如果有的话。



      以下为原文

    I have just started to use the PIC24EP256MC202 an important part of the selection criteria being this had a 16 bit capable SPI interface for driving external DAC's.  If you check both the accepted industry standard (e.g. Wiki) or the data sheet for a common SPI DAC (e.g. MICROCHIP MCP4921) you will discover slave select should be active during the entire SPI transfer.

It seems however Microchip are non-compliant as there slave select in master mode is only active for a single clock period!

On what basis are you selling these chips as containing an SPI interface when it is dysfunctional ?
What work-around do you have for this problem that does not require wait loops in software ?
Why is this issue not dealt with in the silicon errata ?

The attached scope shot shows slave select with a 16 bit data frame 0x200F, clock speed is 1.25Mhz

EDIT, WORK AROUND......
Never use framed mode (SPIxCON2, FRMEN) in an attempt to get an SS signal as this causes the clock to run continuously! When FRMEN is cleared the clock is only output for the duration of the transaction.  This allows the slave select line to be driven by software using an ordinary io pin, setting it true prior to writing data to the spi buffer and returning it to false some suitable time later if at all.
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