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我正在设置ADE7758和PIC18F4520之间的接口,使用下面的配置编译器-XC8 v1.34IDE-MPLABX 3.45MCU-PIC18F4520(运行@3.3V)@20MHZ晶体(HS)PERIF-ADE7758(运行@5v)@10MHZMAIN功能问题,上面的代码是-我能够读取ADE7758中的8位寄存器,但是当我去读24或16位寄存器时,我就没有任何意义的全部值。
以上来自于百度翻译 以下为原文 I am setting up an interface between ADE7758 with PIC18F4520 Using Following Config- Compiler- XC8 v1.34 IDE- MPLABX 3.45 MCU- PIC18F4520 (Running @ 3.3V) @ 20MHZ Crystal (HS) PERIF- ADE7758 (Running @5v)@ 10MHZ #pragma config OSC = INTIO7 // Oscillator Selection bits (Internal oscillator block, CLKO function on RA6, port function on RA7) #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) #pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) // CONFIG2L #pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled) #pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled)) #pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting) // CONFIG2H #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT enabled) #pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768) // CONFIG3H #pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1) #pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset) #pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation) #pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled) // CONFIG4L #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset) #pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled) #pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) // CONFIG5L #pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected) #pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected) #pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected) #pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected) // CONFIG5H #pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected) #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected) // CONFIG6L #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected) #pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected) #pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected) #pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected) // CONFIG6H #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected) #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected) #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected) // CONFIG7L #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks) #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks) #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks) #pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks) // CONFIG7H #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks) //*******************************DATA READ************************************// unsigned char SPI_Read(unsigned char REG_ADDR) { unsigned char recv_data=0; CS = 0;//CS ENABLE Delay1TCY(1); //SOME DELAY TO STABILIZE CHIP SELECT WriteSPI(0X00);//SENDING DEVICE ADDRESS(0X40) WITH READ BIT(READ=1)) WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE recv_data=getcSPI();//GET DATA FROM SLAVE Delay1TCY(1); //SOME DELAY TO STABALIZE CHIP SELECT CS = 1;//CS_DISABLE return ( SSPBUF ); // RETURN READ DATA } //*******************************DATA WRITE************************************// void SPI_Write(unsigned char REG_ADDR,unsigned char DATA) { CS = 0;//CS ENABLE Delay1TCY(1); //SOME DELAY TO STABILIZE CHIP SELECT //WriteSPI(SPI_SLAVE_ID_W_WRITE);//SENDING DEVICE ADDRESS(0X40) WITH READ BIT(WRITE=1)) WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE WriteSPI(DATA);//SEND DATA INTO SLAVE Delay1TCY(1); //SOME DELAY TO STABILIZE CHIP SELECT CS = 1;//CS_DISABLE } unsigned long read16bits(char REG_ADDR) { CS=0; unsigned long ret=0; unsigned int ret1=0; unsigned char ret0=0; //_delay(10); WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE ret0=getcSPI(); WriteSPI(0x00); ret1=getcSPI(); CS=1; ret=(ret1<<8)|ret0; return ret; } unsigned long read24bits(char REG_ADDR) { CS=0; unsigned char ret1=0; unsigned char ret2=0; unsigned char ret3=0; unsigned long x=0; WriteSPI(REG_ADDR);//SENDING DEVICE REGISTER CONTROL BYTE TO SLAVE DEVICE WriteSPI(0x00); Delay1TCYx(10); ret1=SSPBUF; WriteSPI(0x00); Delay1TCYx(10); ret2=SSPBUF; Delay1TCYx(10); WriteSPI(0x00); ret3=SSPBUF; CS=1; x= (ret1<<16)|(ret2<<8)|ret3; return x; } //**************************INITIALIZE SPI AND MCU PORT************************// void INTI_ADE7758() { CloseSPI(); //TURN OFF SPI MODULE IF IT WAS OPEN //*********************CONFIGURE SPI MASTER DEVICE'S HARDWARE******************// OpenSPI(SPI_FOSC_64,MODE_10,SMPMID); //******************INITIALIZE HARDWARE I/O PINS FOR SLAVE DEVICE***********// TRISEbits.TRISE2 = 0; // /CS - Output (Chip Select) TRISCbits.TRISC5 = 0; // /SDO - Output (Serial Data Out) TRISCbits.TRISC4 = 1; // /SDI - Input (Serial Data In) TRISCbits.TRISC3 = 0; // /SCK - Output (Clock) TRISCbits.TRISC1 = 0; // /RST - Output (MCP23S18 Hardware Reset) CS = 1; // DISABLE !CS } MAIN Function void main(void) { init();//INITIALIZE THE SYSTEM SPI_Write(OPMODE, 0x00); //******************************WRITE CODE HERE******************************** while(1) { // phas_a_v=read16bits(ZXTOUT); // A=SPI_Read(MMODE); B=read24bits(AVRMS); //C=read16bits(COMPMODE); } } Problem with the above Code is -I am able to read 8BIt Register in ADE7758 But When i go to Read 24 or 16BIt Register then There isn't any meaning Full Value that I Receive. |
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6个回答
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你会读书吗?VRMS,16位,24位值与我的代码?
以上来自于百度翻译 以下为原文 Are you able to read? VRMS, 16 bit, 24-bit values with my code? |
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你也说使用外部OSC。20兆赫,但你的代码显示了这个内部OSC。为什么呢?
以上来自于百度翻译 以下为原文 Also your are saying to use External Osc. 20 MHz but your code shown this Internal Osc. Why so? |
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您需要使用PIC18LF45 20来处理该规格。
以上来自于百度翻译 以下为原文 You would need to use the PIC18LF4520 to work at that spec. |
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HI 1和0以上的设置是否有效?没有电平转换器?卡兰
以上来自于百度翻译 以下为原文 Hi 1and0 Do the above setup will work? Without Level Converter? Karan |
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我不熟悉ADE775。快速浏览一下它的数据表,就可以看到2.4V min的逻辑输入VIH和4V min的逻辑输出VOH。因此,将VOH降低到3.3V PIC设备是可取的。@OP:为什么不给PIC提供5V呢?
以上来自于百度翻译 以下为原文 I'm not familiar with the ADE7758. A quick glance at its datasheet shows logic inputs VIH of 2.4 Vmin and logic outputs VOH of 4 V min. So reducing VOH to that of the 3.3V PIC device is advisable. @OP: Why not supply the PIC with 5V? |
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如果使用3.3V微芯片MCU,我建议OP采用相同的方式,SPI引脚合适的双向电平转换器IC必须具有+5V输入公差。——卡兰
以上来自于百度翻译 以下为原文 @1and0 yes I want to suggest to OP same or if using 3.3V Microchip MCU, +5V input tolerance must be required for SPI pinsor suitable bidirectional Level Converter IC. -- Karan |
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