怎么使用DMA创建直方图

你好，戴维，
不可能完全使用DMA实现语句。因为你绝对不能用DMA（它只传送数据）做一个“+”到一个内存位置。
现在你也不需要这个操作的CPU了。可以使用UDB实现一个简单的“++”逻辑。可能像下面这样：
1。由于DMA描述符位于内存中，实际上可以通过另一个描述符更新一个描述符的源地址（在RAM中）。即使用一个描述符将SAR结果的16位（半字）传送到第二描述符的源地址的LSB 16位。默认情况下，这个描述符指向Abffff[[ 0 ] ]，并使用更新的LSB 16位，这将获取您想要增加的变量地址（Abffff[SalaRebug ]）。
2。一旦完成传输，就可以使用第二（更新）描述符启动传输。此传输将从Abffff[SalaRead ]移动1/2／4字节的直方图数据到UDB FIFO寄存器（1/2／4字节宽）。
三。通过从FIFO获取数据，在UDB中执行增量操作。
4。使用一个第三DMA描述符将UDB 8/16 /32位工作寄存器输出传送到Abffff[SARORESUT]地址（您可以将在步骤1中生成的源地址16位转移到第三描述符的目的地址LSB 16位），同时在步骤2中执行转移/增量。3）。
这将需要一些不错的UDB/Verilog编码技巧。但肯定是可能的，所有这些都应该采取4-5个周期。代替描述符，如果你选择每个带有描述符的独立通道，TopDesign的路由复杂性可能会下降。
当做，
Meenakshi Sundaram R



     以下为原文
  Hello David,
 
It is not possible to implement the statement entirely using DMA. As you definitely cannot do a '++' to a memory location using DMA (it only transfers data).
 
Now you do not need CPU for this operation too. You can use UDBs to implement a simple logic for the '++'. May be something like below:
1. Since DMA descriptors are in memory, you can actually update the source address of one descriptor (which is in RAM) through another descriptor. i.e. using one descriptor do a 16-bit (half-word) transfer of the SAR result to the LSb 16-bits of the source address of the second descriptor. This descriptor by default shall point to aBuffer[0] and with updated LSb 16-bits this will fetch the variable address you want to increment (aBuffer[SAR_RESULT]).
2. Once that transfer is complete, you can initiate a transfer using the 2nd (updated) descriptor. This transfer will move 1/2/4 bytes of histogram data from aBuffer[SAR_RESULT] to a UDB FIFO register (1/2/4 byte wide).
3. Perform an increment operation in the UDB by taking data from FIFO.
4. Use a third DMA descriptor to transfer the UDB 8/16/32-bit working register output to aBuffer[SAR_RESULT] address (you can transfer the source address 16-bits generated in step 1 to the destination address LSb 16-bits of the 3rd descriptor, while you are performing the transfer/increment in step 2/3).
 
This will require some decent UDB/verilog coding skills. But is definitely possible  and all the above should take around 4-5 cycles. Instead of descriptors, if you pick independent channels with a descriptor each, the routing complexity in TopDesign might come down
 
Regards,
Meenakshi Sundaram R