DW0和DW1是DMA的哪一部分？

你好，USER 4444 43345，
首先，在PSoC 6中可用的5个总线主控器是CM4、CM0+、Cuto、DW0和DW1。测试控制器是总线主控器，但对客户没有多大用处。
现在，DATAWORD（DW）和直接存储器存取（DMA）的定义有一个非常细微的差别。基本上，DWS主要在存储器到/FRO外围传输的上下文中被引用，并且DMA主要在存储器到存储器传输的上下文中被引用。虽然两者功能相同（没有太大差别），但它们的主要应用是它们的目标，反映命名。
现在PSoC 6实现了DWs（不是DMAS——记住它们是相同的，但主要应用程序定义命名），因为它们的主要任务是在内存和外围设备之间传输数据。然而，数据线也可以执行内存到内存传输。
PSoC 6具有两个DW块，这意味着它可以使用这两个块执行两个独立的和同时的传输。每个DW支持多达16个信道-总共2x16＝32个信道，并且在任何时间只有一个信道可以在DW内活动（由优先级决定）。
让我知道这是否有帮助。
当做，
Meenakshi Sundaram R



     以下为原文
  Hello user_474444345,
 
First of all, the 5 bus masters available in PSoC 6 are CM4, CM0+, Crypto, DW0 and DW1. Test controller is a bus master but that is of not much use to a customer.
 
Now, there is a very subtle difference in the definition of DataWire (DW) and Direct Memory Access (DMA). Essentially DWs are primarily referenced in the context of Memory to/fro Peripheral transfers and DMAs are primarily referenced in the context of Memory to Memory transfers. Though both function the same (without much difference), the primarily application they are targeted for, reflect the naming.
 
Now PSoC 6 implements DWs (not DMAs - remember they are the same but primary application define the naming) as their primary task is to transfer data between memory and peripherals. However, datawires can perform memory to memory transfers as well.
 
PSoC 6 has two DW blocks, which means it can perform two independent and simultaneous transfers using these two blocks. Each DW supports up to 16 channels - total 2x16 = 32 channels and at any time only one channel can be active within a DW (decided by a priority).
 
Let me know if this helps.
 
Regards,
Meenakshi Sundaram R