P6[6]和P6[7]在CY8CKIT-062-BLE先锋板上的应用

我试图建立一个项目，使用CY8CITK-062-BLE先锋板与外部连接的头ADC，SPI和UART。我需要8 +单端ADC，并已建议建立一个单一的ADC与2个配置：
配置0有4个输入，配置1有8个输入，这些在P7和P10上通过引脚扩散，但是当我尝试生成应用时，它错误地说，使用SW6的P6（6）和P6（7）防止所有SPI引脚被使用，所以…
Q1我需要什么样的SWD设置在我的调试选择下拉在系统选项卡？我希望能够编写和调试代码，我可以使用内置的KiTrp2或插入到JTAG头中的MIXPROG 3。
尽管Q1上面，我设置调试选项系统”标签下的GPIO的但仍未能产生错误消息的应用…
NET（s）“ADC:MuxOutPuls'”跨多个AMUXBUS段。这可能会导致模拟路由失败。
和
为了实现指定的这些网的连接，有必要加入的amuxbus多网段。这一般是由于引脚已锁定的位置是远离自己的目的地。而这种用法是有效的，它限制了其他网的路由，导致路由失败在拥挤的设计。如果你经历一个路由失败，考虑开锁销或移动到一个更接近他们的目的地。看到TRM和模拟装置编辑图的更多细节。
Q2模拟销我选择显然是不好的但是有规律，我能做什么？做所有引脚的ADC需要对同一端口的每个配置？
提前感谢。
特德
                    
                    
               
                                                                                      以下为原文
                                            I'm trying to build a project that uses the CY8CKIT-062-BLE Pioneer Board with external connections to the headers for ADC, SPI, and UART.  I need 8+ single-ended ADCs and have been advised to set up a the single ADC with a 2 configurations:

Config 0 has 4 inputs and Config 1 has 8 inputs and these are spread across pins on P7 and P10 but when I try to generate the application it errors saying that the use of P6[6] and P6[7] for SWD are preventing all sorts of SPI pins from being usable so...

Q1 What do I need as far as SWD settings on my Debug Select drop down in the System tab?  I want to be able to write and debug code and I could use either the KitProg2 that's built in or a Miniprog 3 plugged into a JTAG header.

Notwithstanding Q1 above, I set the Debug Select option under the System tab to 'GPIO' but it still failed to generate the application with the error message...

Net(s) "ADC:muxoutPlus" span multiple amuxbus segments. This may cause analog routing to fail.

and

In order to implement the connectivity specified by these nets, it is necessary to join multiple segments of the amuxbus together. This usually occurs because pins have been locked to locations which are far from their destination. While this usage is valid, it constrains routing for other nets and can lead to routing failures in congested designs. If you experience a routing failure, consider unlocking pins or moving them to a location which is closer to their destination. See the TRM and the Analog Device Editor diagram for more details.

Q2 The analog pins I've selected clearly are not OK but are there rules to what I can do?  Do all the pins for ADC need to be on the same port for each Configuration?

Thanks in advance.

Ted