请问beaglebone black的开发板的gpmc驱动如何开发？

gpmc要接什么外设？可以参考gpevm的NAND驱动部分。

需要接2个fpga和4个双口RAM。
“gpevm的NAND驱动部分”这个在哪里能找到？
谢谢！

你先参考下am335x-evm.dts中的gpmc部分

Jian Zhou：您好！
    我用的内核是bb-black-debian-kernel-3.8，其中的am335x-evm.dts里面并无gpmc相关内容。
你是指的am33xx.dtsi中的gpmc吗？
   am33xx.dtsi中gpmc（内容好象不足以参考）：
gpmc: gpmc@50000000 [
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
reg = <0x50000000 0x01000000>;
interrupts = <100>;
gpmc,num-cs = <7>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
status = "disabled";
];
是否能告诉我哪里可以找到你说的gpmc内容？
谢谢！

请您下载TI的Linux SDK：
http://software-dl.ti.com/sitara_linux/esd/AM335xSDK/08_00_00_00/index_FDS.html

Jian Zhou：您好！
    我下载了SDK，依照其中的am335x_evm.dts修改如下：
引脚复用：
nandflash_pins_default: nandflash_pins_default [
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
0xec (PIN_OUTPUT | MUX_MODE1) /* lcd_ac_bias_en.gpmc_a11 */
0xc0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data8.gpmc_a12 */
0xc4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data9.gpmc_a13 */
0xc8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data10.gpmc_a14 */
0xcc (PIN_OUTPUT | MUX_MODE1) /* lcd_data11.gpmc_a15 */
0xd0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data12.gpmc_a16 */
0xd4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data13.gpmc_a17 */
0xd8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data14.gpmc_a18 */
0xdc (PIN_OUTPUT | MUX_MODE1) /* lcd_data15.gpmc_a19 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_OUTPUT | MUX_MODE2) /* gpmc_wpn.gpmc_csn5 */
0x78 (PIN_OUTPUT | MUX_MODE2) /* gpmc_be1n.gpmc_csn6 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
0x84 (PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.gpmc_be1n */
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_cs3.gpmc_cs3 */
0x8c (PIN_OUTPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
];
nandflash_pins_sleep: nandflash_pins_sleep [
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xc (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xa4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xa8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xac (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xb0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xb4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xbc (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xec (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xc4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xcc (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xd0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xd4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xd8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xdc (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x8c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
];

节点定义：
&gpmc [
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&nandflash_pins_default>;
pinctrl-1 = <&nandflash_pins_sleep>;
ranges = <0 0 0x00000000 0x10000000 /* CS0: NAND 256M */
1 0 0x13000000 0x1000000 /* CS1: dual_business 16M*/
2 0 0x11000000 0x2000000 /* CS3: fpga_modem 16M*/
3 0 0x15000000 0x1000000 /* CS5: dual_maindem_out 16M*/
4 0 0x16000000 0x1000000 /* CS6: dual_auxdem_out 16M*/
>;
nand@0,0 [
reg = <0 0 0>; /* CS0, offset 0 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 [
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
];
partition@1 [
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
];
partition@2 [
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
];
partition@3 [
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
];
partition@4 [
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
];
partition@5 [
label = "NAND.u-boot";
reg = <0x000C0000 0x00100000>;
];
partition@6 [
label = "NAND.u-boot-env";
reg = <0x001C0000 0x00020000>;
];
partition@7 [
label = "NAND.u-boot-env.backup1";
reg = <0x001E0000 0x00020000>;
];
partition@8 [
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
];
partition@9 [
label = "NAND.file-system";
reg = <0x00A00000 0x0F600000>;
];
];
dual_business@1,0 [
reg = <0 0 0>; /* CS1, offset 0 */
nand-bus-width = <16>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
];
fpga_modem@2,0 [
reg = <0 0 0>; /* CS3, offset 0 */
nand-bus-width = <16>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
];
dual_maindem_out@3,0 [
reg = <0 0 0>; /* CS5, offset 0 */
nand-bus-width = <16>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
];
dual_auxdem_out@4,0 [
reg = <0 0 0>; /* CS6, offset 0 */
nand-bus-width = <16>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
];
不知道这样做对不对？
其中的：
reg = <0 0 0>; /* CS6, offset 0 */
nand-bus-width = <16>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
部份应该如何进行修改？
谢谢！

@Jian Zhou
    还有什么资料可以学习的吗？
谢谢！

你可以去CSDN上找找类似的介绍

能不能推荐一下，我看了一些了，但一直不清楚。
谢谢！

@ Jian Zhou
才看到了ti-gpmc.txt，总算明白了dts中的这些是什么了。
不过，
nand@0,0 [
reg = <0 0 0>; /* CS0, offset 0 */
里面这个reg的三个参数不太明白。前面两个对应的应该是rangs中的前两个”地址“，第三个是什么？
谢谢！

学习下这个：
http://blog.csdn.net/lichengtongxiazai/article/details/38941997

Jian Zhou：您好！
    感谢你那么晚还给我发信息！
    相似内容的文章看过两个，或许是看得不够仔细吧。我再仔细看看。
谢谢！