CE5212 Designer Sinewave LUT项目错误

需要解决的几个问题
1）全局属性，OpAmp Bias和ANANOLL缓冲器属性都设置为低功耗，
正弦波失真。这些应该设置为高功率。
2）由于缓冲器不是R R，所以当接近任一个时，它会加剧DAC输出的失真。
钢轨。也许一个注释应该添加到AP注释中。
3）作为一个练习，为了消除2中的失真，我增加了一个PGA，设置它的G & lt；1，以获得波形。
从轨道上，会出现一个高度扭曲的波形，？不知道为什么。
注意：在所有观测中，仅用10m范围探头加载缓冲器，可能在2的情况下加载高负载。
可能会改善输出失真？
PSoC设计师5.4
问候，Dana。



     以下为原文
  A couple of issues that need addressing -
     
    1) Global properties, the OpAmp Bias and Ananlog Buffer properties both were set to low power,
    so sine wave distorted. Those should be set to high power.
     
    2) Because the A Buffer is not R-R, its exacerbates the distortion of the DAC output when close to either
    rail. Maybe a note should be added to ap note covering this.
     
    3) As an exercise, to eliminate the distortion in 2), I added a PGA, set its G < 1, to get waveform away
    from rails, and woulnd up with a highly distorted waveform, ? Not sure why.
     
    Note A Buffer was only loaded with 10M scope probe in all observations, maybe in case of 2) high load
    might actually improve output distortion.....?
     
    PSOC Designer 5.4
     
    Regards, Dana.