你好@ snchao
您使用Vivado GUI或脚本来运行综合和实现吗？
您是否在精心设计或综合设计中将位置分配给MIG引脚并运行report_drc以确保引脚排列有效？
当您更改MIG引脚排列时，您需要从opt_design阶段重新运行实现。
谢谢，迪皮卡.----------------------------------------------
---------------------------------------------- Google之前的问题
张贴。
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以上来自于谷歌翻译
以下为原文
Hi @snchao
Are you using Vivado GUI or scripts to run synthesis and implementation?
Did you assign the locations to MIG pins on elaborated or synthesized design and run report_drc to ensure pinout is valid?
You will need to rerun implementation from opt_design stage when you change the MIG pinout.
Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
你好@ snchao
您使用Vivado GUI或脚本来运行综合和实现吗？
您是否在精心设计或综合设计中将位置分配给MIG引脚并运行report_drc以确保引脚排列有效？
当您更改MIG引脚排列时，您需要从opt_design阶段重新运行实现。
谢谢，迪皮卡.----------------------------------------------
---------------------------------------------- Google之前的问题
张贴。
如果某人的帖子回答了您的问题，请将帖子标记为“接受为解决方案”。
如果你看到一个特别好的和信息丰富的帖子，考虑给它Kudos（左边的明星）
以上来自于谷歌翻译
以下为原文
Hi @snchao
Are you using Vivado GUI or scripts to run synthesis and implementation?
Did you assign the locations to MIG pins on elaborated or synthesized design and run report_drc to ensure pinout is valid?
You will need to rerun implementation from opt_design stage when you change the MIG pinout.
Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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