时钟布局器无法为您的设计找到解决方案。
除了放置实际时钟负载之外，它还可能必须对时钟域进行布局规划以控制时钟负载布局。
根据器件系列，每个时钟区域只能支持一定数量的全局时钟域。
如果您在设计中使用区域组范围，则可能会干扰时钟布局器找到解决方案的能力。
如果要实例化BUFH，也会使时钟位置复杂化。
根据设备架构，如果您有许多本地时钟也会干扰本地时钟位置：
http://www.xilinx.com/support/answers/32528.htm
以上来自于谷歌翻译
以下为原文
The clock placer has failed to find a solution for your design. Besides placing the actual clock loads it may also have to floorplan the clock domains to control the clock load placement. Depending on the device family each clock region can only support a certain number of global clock domains. If you are using area group ranges in your design you may be interfering with the clock placer's ability to find a solution. If you are instantiating BUFHs that can also complicate clock placement. Depending on the device architecture, If you have a lot of local clocks that can also interfere with the local clock placement:
http://www.xilinx.com/support/answers/32528.htm
时钟布局器无法为您的设计找到解决方案。
除了放置实际时钟负载之外，它还可能必须对时钟域进行布局规划以控制时钟负载布局。
根据器件系列，每个时钟区域只能支持一定数量的全局时钟域。
如果您在设计中使用区域组范围，则可能会干扰时钟布局器找到解决方案的能力。
如果要实例化BUFH，也会使时钟位置复杂化。
根据设备架构，如果您有许多本地时钟也会干扰本地时钟位置：
http://www.xilinx.com/support/answers/32528.htm
以上来自于谷歌翻译
以下为原文
The clock placer has failed to find a solution for your design. Besides placing the actual clock loads it may also have to floorplan the clock domains to control the clock load placement. Depending on the device family each clock region can only support a certain number of global clock domains. If you are using area group ranges in your design you may be interfering with the clock placer's ability to find a solution. If you are instantiating BUFHs that can also complicate clock placement. Depending on the device architecture, If you have a lot of local clocks that can also interfere with the local clock placement:
http://www.xilinx.com/support/answers/32528.htm
举报
