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NVIDIA目前在上海北京深圳招聘Physical Design Engineer的职位，职位描述如下，感兴趣的朋友可以发送简历到tracyw@nvidia.com DESCRIPtiON: A senior rolein physical design for NVIDIA GPU and Mobile chips Participate invarious aspects of physicaldesign, including full chip floor planning, power/clock distribution,timing optimization, place& route, timing closure, power/signal integrity analysis, andphysical verification Troubleshoot awide variety of design and flow complicated issues, and apply proactiveintervention Collaboratewith RTL, DFT and Circuit designers to ensure the high quality of designimplementation and optimization MINIMUMREQUIREMENTS: BS inEngineering or Science. Power user ofEDA tools from Synopsys (ICC/DC/PT/STAR-RC), Cadence (EDI/EPS) or Mentor(Olympus-SOC). Experience inClock/Power Distribution, P&R,Timing closure, RC Extraction, and verification on 40nm, or 28nmtechnology. 3+ years ofexperience in above areas. PREFERRED: MS inEngineering or Science. Knowledge in20nm or FinFET technology, circuit design, and package design. Experience inphysical verification tools from Synopsys (ICV/Mojave) or Mentor (Calibre). Proficiency inPerl, TCL and Makefile scripts. 
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