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本帖最后由 爱苹果的猫 于 2013-11-23 09:47 编辑
用CPLD做编码器的解码,用的是状态机写的485通讯,遇到一个很奇怪的问题,写的状态机如下:
case(state) Idle: begin over <= 1'b0; txd <= 1'b1; if(start_fg == 1'b1) begin state <= Request; E_c <= 1'b1; start_fg1 <= 1'b1; end end Request: begin if(i == 8'd10) begin state <= Wait; start_fg1 <= 1'b0; E_c <= 1'b0; CF_r <= 10'd0; txd <= 1'b1; i <= 6'd0; end else begin txd <= CF[6'd9-i]; i <= i+1'b1; end end Wait: begin txd <= 1'b1; E_b <= 1'b1; if(CF_r[3:0] == 4'b0010) begin state <= Receive; i <= 6'd0; CF_r <= (CF_r << 1)|re; i <= 6'd4; end else begin CF_r <= (CF_r << 1)|re; if(i == 4'd14) begin state <= Idle; erro <= 2'd3; end else begin i <= i+1'b1; end end end Receive: begin if(i < 6'd9) begin CF_r <= (CF_r << 1)|re; i <= i+1'b1; end else if(i == 6'd9) begin if(CF_r == CF) begin CRC_buf <= CRC_buf|{CF_r[8:1],40'd0}; CF_r <= (CF_r << 1)|re; i <= i+1'b1; end else begin state <= Idle; i <= 0; erro <= 2'd0; end end else if(i < 6'd19) begin CF_r <= (CF_r << 1)|re; i <= i+1'b1; end else if(i == 6'd19) begin if(CF_r[4] | CF_r[3]) begin erro <= 2'd2; i <= i+1'b1; end else begin CRC_buf <= CRC_buf|{CF_r[8:1],32'd0}; DATA_TEMP <= (DATA_TEMP >> 1)|{re, 29'd0}; i <= i+1'b1; end end else if(i < 6'd49) begin DATA_TEMP <= (DATA_TEMP >> 1)|{re, 29'd0}; i <= i+1'b1; end else if(i < 6'd59) begin CF_r <= (CF_r << 1)|re; i <= i+1'b1; end else begin DATA_TEMP[23:0] = {DATA_TEMP[28:21],DATA_TEMP[18:11],DATA_TEMP[8:1]}; for(i = 6'd0; i < 24; i = i+1'd1) begin CRC_buf[31-i] = DATA_TEMP; end CRC_buf = CRC_buf|CF_r[8:1]; for(i = 6'd47; i > 6'd7; i = i-1'b1) begin CRC_buf[47:40] = {CRC_buf[46:40],(CRC_buf[47]^CRC_buf[39])}; CRC_buf[39:0] = CRC_buf[38:0]<<1; //shift end if (!CRC_buf[47:40]) begin DATA_LAST =DATA; //24'd3;// DATA =DATA_TEMP[23:0]; //24'h01fffd; // end else begin CRC_buf[47:40]=8'd0; DATA=24'hffffff; end state <= Idle; E_b <= 1'd0; i <= 6'd0; over <= 1'd1; end end endcase DATA是我通讯读取的数值,我只是在CRC校验出错后加了一个DATA赋值全1(下划线那句),用示波器看txd都没有输出了,但这两者之间没有影响,会不会是综合的问题?RTL Viewer出来有4页很难去查,有没有哪位有建议? |
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