Nvidia Shanghai Hiring---ASIC/SOC Verification Engineer

2012-7-6 14:27:07 2197 NVIDIA

0 本帖最后由 NvidiaHR 于 2012-7-6 14:28 编辑 ASIC/SOC Verification Engineer: RESPONSIBILITIES: - RTL design, verification, synthesis for various low powercontrol logic in GPU chips. - Develop and maintain verification environment at both fullchip & unit level - Code/functional coverage analysis - Responsible for running both RTL & gate levelsimulation - Develop testing and regression methodologies - Develop/maintain/enhance environmenttools/scripts/makefiles MINIMUM REQUIREMENTS: - BSEE/MSEE/BSCS/MSCS with 3+/5+ years of experience in ASICdesign or verification - Proficient in Verilog HDL - Familiar with logic simulators and debug tools (VCS,NCSIM, Verdi and etc.) - Working knowledge in C/C++, Makefile - Must have strong programming skills in one or morescripting languages: TCL, Perl, Python - Knowledge in one of the below areas is a big plus + UVM/VMM experience + Low power design/verification experience (Multi-Voltage,power gating, UPF/APF and etc.) + ARM based SoC verification experience + AHB/AXI architecture + Embedded OS If you have interests of the position above, pls send your resume to hshen@nvidia.com. You can also contact me through MSN: yiyun16chris@126.com Welcome to Join us!!! 0
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