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我正在使用 S32K146 引脚 PTA3 和 PTA6 作为 adc 输入。PTA3 是 ADC1_SE1,PTA6 是 ADC0_SE2。我想我确实更正了配置,但两个引脚的 adc 输出始终为 0。尝试调试但无法找到问题。请让我知道如何调试它。
static adc_chan_config_t vp_voltage_ChnConfig = { .interruptEnable = false, .channel = ADC_INPUTCHAN_EXT2, }; static adc_chan_config_t cp_voltage_ChnConfig = { .interruptEnable = false, .channel = ADC_INPUTCHAN_EXT1, }; #define VP_VOLTAGE_ADC_INSTANCE 0U #define CP_VOLTAGE_ADC_INSTANCE 1U /*common configuration for ADC channels */ static const adc_converter_config_t adConv_ConvConfig0 = { .clockDivide = ADC_CLK_DIVIDE_4, .sampleTime = 15U,//255U, .resolution = ADC_RESOLUTION_10BIT, .inputClock = ADC_CLK_ALT_1, .trigger = ADC_TRIGGER_SOFTWARE, .pretriggerSel = ADC_PRETRIGGER_SEL_PDB, .triggerSel = ADC_TRIGGER_SEL_PDB, .dmaEnable = false, .voltageRef = ADC_VOLTAGEREF_VREF, .continuousConvEnable = false, .supplyMonitoringEnable = false, }; /* For ADC calibration, 32 samples are averaged. */ static const adc_average_config_t adc_common_avg_en_config = { .hwAvgEnable = true, .hwAverage = ADC_AVERAGE_4, }; static adc_chan_config_t adc_band_gap_config = { .interruptEnable = false, .channel = ADC_INPUTCHAN_BANDGAP, }; void config_adc_read_channel (void){ /* ADC conversion configuration */ ADC_DRV_ConfigConverter(VP_VOLTAGE_ADC_INSTANCE, &adConv_ConvConfig0); /* Enable HW Averaging of 32 samples */ ADC_DRV_ConfigHwAverage(VP_VOLTAGE_ADC_INSTANCE, &adc_common_avg_en_config); ADC_DRV_AutoCalibration(VP_VOLTAGE_ADC_INSTANCE); sw_asm_delay_us(50U); /* HW Averaging for subsequent conversions */ // ADC_DRV_ConfigHwAverage(VP_VOLTAGE_ADC_INSTANCE, &adc_common_avg_en_config); /* ADC conversion configuration */ ADC_DRV_ConfigConverter(VP_VOLTAGE_ADC_INSTANCE, &adConv_ConvConfig0); /* Enable HW Averaging of 32 samples */ ADC_DRV_ConfigHwAverage(CP_VOLTAGE_ADC_INSTANCE, &adc_common_avg_en_config); ADC_DRV_AutoCalibration(CP_VOLTAGE_ADC_INSTANCE); sw_asm_delay_us(50U); /* HW Averaging for subsequent conversions */ //ADC_DRV_ConfigHwAverage(CP_VOLTAGE_ADC_INSTANCE, &adc_common_avg_en_config); } bool get_vp_voltage(float_t *voltage ){ bool ret = true; volatile float_t vref = 0.0f; volatile uint16_t vref_raw = 0U; float_t conv_volt = 0.0f; uint16_t adc_throttle_1_voltage = 0U; ADC_DRV_ConfigChan(VP_VOLTAGE_ADC_INSTANCE, 0UL, &adc_band_gap_config); sw_asm_delay_us(10U); ADC_DRV_WaitConvDone(VP_VOLTAGE_ADC_INSTANCE); ADC_DRV_GetChanResult(VP_VOLTAGE_ADC_INSTANCE, 0U, (uint16_t *)&vref_raw); vref = (float_t)((1000.0f * (1U << 10U)) / vref_raw) / 1000.0f; ADC_DRV_ConfigChan(VP_VOLTAGE_ADC_INSTANCE, 0UL, &vp_voltage_ChnConfig); ADC_DRV_WaitConvDone(VP_VOLTAGE_ADC_INSTANCE); ADC_DRV_GetChanResult(VP_VOLTAGE_ADC_INSTANCE, 0U, (uint16_t *)&adc_throttle_1_voltage); *voltage = conv_volt; ADC_DRV_ConfigChan(CP_VOLTAGE_ADC_INSTANCE, 0UL, &cp_voltage_ChnConfig); sw_asm_delay_us(10U); ADC_DRV_WaitConvDone(CP_VOLTAGE_ADC_INSTANCE); ADC_DRV_GetChanResult(CP_VOLTAGE_ADC_INSTANCE, 0U, (uint16_t *)&adc_throttle_1_voltage); *voltage = adc_throttle_1_voltage; return ret; }{ .base = CP_VOLTAGE_READ_PORT, .pinPortIdx = CP_VOLTAGE_READ_PIN, .pullConfig = PORT_INTERNAL_PULL_NOT_ENABLED, .passiveFilter = false, .driveSelect = PORT_LOW_DRIVE_STRENGTH, .mux = PORT_PIN_DISABLED, .pinLock = false, .intConfig = PORT_DMA_INT_DISABLED, .clearIntFlag = false, .gpioBase = PTA, .digitalFilter = false, .direction = GPIO_UNSPECIFIED_DIRECTION, .initValue = 1U, }, { .base = VP_VOLTAGE_READ_PORT, .pinPortIdx = VP_VOLTAGE_READ_PIN, .pullConfig = PORT_INTERNAL_PULL_NOT_ENABLED, .passiveFilter = false, .driveSelect = PORT_LOW_DRIVE_STRENGTH, .mux = PORT_PIN_DISABLED, .pinLock = false, .intConfig = PORT_DMA_INT_DISABLED, .clearIntFlag = false, .gpioBase = PTA, //NULL, .digitalFilter = false, .direction = GPIO_UNSPECIFIED_DIRECTION, .initValue = 1U, }, peripheral_clock_config_t peripheralClockConfig0[NUM_OF_PERIPHERAL_CLOCKS_0] = { { .clockName = FlexCAN0_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = FlexCAN1_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = FlexCAN2_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = ADC0_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = ADC1_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = CMP0_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = LPSPI0_CLK, .clkGate = true, .clksrc=CLK_SRC_FIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = LPSPI2_CLK, .clkGate = true, .clksrc=CLK_SRC_FIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = FLEXIO0_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = LPI2C0_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = FTFC0_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = LPUART1_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = LPUART2_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = LPIT0_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = PORTA_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = PORTB_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = PORTC_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = PORTD_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = PORTE_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = RTC0_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = LPTMR0_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV2, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = FTM0_CLK, .clkGate = true, .clksrc=CLK_SRC_SIRC_DIV1, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, { .clockName = DMAMUX0_CLK, .clkGate = true, .clksrc=CLK_SRC_OFF, .frac = MULTIPLY_BY_ONE, .divider = DIVIDE_BY_ONE, }, }; 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