RMII clk in
&gmac0_clkin{ clock-frequency = <50000000>; };
&gmac0 {phy-mode = "rmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RMII_SPEED>;
assigned-clock-rates = <0>, <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim &gmac0_clkinout &gmac0_rx_bus2 &gmac0_tx_bus2 &gmac0_rx_er>;
phy-handle = <&rmii_phy0>;
status = "okay";
};
&gmac1_clkin{ clock-frequency = <50000000>; };
&gmac1 {phy-mode = "rmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RMII_SPEED>, <&gmac1_clkin>;
assigned-clock-rates = <0>, <50000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim &gmac1m1_clkinout &gmac1m1_rx_bus2 &gmac1m1_tx_bus2 &gmac1m1_rx_er>;
phy-handle = <&rmii_phy1>;
status = "okay";
};
原作者:m0_37039448
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