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硬件资源:
一、编译相关: 1、设备树dts 介绍: linux DTS 介绍 2、设备树dts 入门总结:
3、设备树dts 编译: 1、指定要编译的dts 文件:device/rockchip/.BoardConfig.mk(以 rk3568-firefly-aioj-edp-M156X40为 例) 1 #!/bin/bash 2 3 CMD=`realpath $BASH_SOURCE` 4 CUR_DIR=`dirname $CMD` 5 6 source $CUR_DIR/firefly-rk3568_buildroot.mk 7 8 # Kernel dts 9 ++ #export RK_KERNEL_DTS=rk3568-firefly-aioj 10++ export RK_KERNEL_DTS=rk3568-firefly-aioj-edp-M156X40 2、添加编译文件:kernel/arch/arm64/boot/dts/rockchip/Makefile 110 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux.dtb 111 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux-spi-nand.dtb 112 ++ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-firefly-aioj-edp-M156X40.dtb 二、edp 屏幕时序调试: AIO-3568J的SDK有EDP的DTS文件:kernel/arch/arm64/boot/dts/rockchip/rk3568-firefly-aioj-edp_M156X40.dts 1、引脚配置(根据 datasheet 调整): a、lcd 使能: [tr]NAMEGPIOGPIO_ACTIVE[/tr][tr]vcc3v3_lcd_edp (LCD_EN)GPIO1_B1GPIO_ACTIVE_HIGH[/tr] vcc3v3_lcd_edp: vcc3v3-lcd-edp { compatible = "regulator-fixed"; gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-name = "vcc3v3_lcd_edp"; regulator-boot-on; regulator-state-mem { regulator-off-in-suspend; }; }; b、背光 使能: [tr]NAMEGPIOGPIO_ACTIVE[/tr][tr]enable-gpios(BL_EN)GPIO1_A4GPIO_ACTIVE_HIGH[/tr] edp_panel: edp-panel { compatible = "simple-panel"; status = "okay"; power-supply = <&vcc3v3_lcd_edp>; enable-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>; //bus-format = backlight = <&backlight>; ... ports { panel_in_edp: endpoint { remote-endpoint = <&edp_out_panel>; }; }; }; c、EDP_HPD 使能: [tr]NAMEGPIOGPIO_ACTIVE[/tr][tr]hpd-gpios(EDP_HPD)GPIO0_C2GPIO_ACTIVE_HIGH[/tr] &edp { status = "okay"; hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; force-hpd; ports { edp_out: port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; edp_out_panel: endpoint@0 { reg = <0>; remote-endpoint = <&panel_in_edp>; }; }; }; }; 2、背光配置: backlight: backlight { status = "okay"; compatible = "pwm-backlight"; pwms = <&pwm14 0 2000 1>;//pwm4:PWM number 0 2000:PWM period in nanoseconds 1:polarity(如有问题可调试0|1) brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; default-brightness-level = <200>; };
3、显示时序配置:(主要看 timing0 节点) 图片:屏参包括屏的格式、dclk、时序等。 根据文档数据可得:
edp_panel: edp-panel { compatible = "simple-panel"; status = "okay"; power-supply = <&vcc3v3_lcd_edp>; enable-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; prepare-delay-ms = <201>; enable-delay-ms = <201>; backlight = <&backlight>; display-timings { native-mode = <&timing0>; timing0: timing0 { clock-frequency = <80000000>; hactive = <1280>; vactive = <800>; hfront-porch = <110>;/只需保证hback-porch + hfront-porch + hsync-len=236 hsync-len = <10>; hback-porch = <116>; vfront-porch = <13>;//只需保证vback-porch + vfront-porch + vsync-len=31 vsync-len = <4>; vback-porch = <14>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { panel_in_edp: endpoint { remote-endpoint = <&edp_out_panel>; }; }; }; 三、调试遇到的问题 1、背光不亮 主要修改:pwms 属性,包括 “周期” 和 “pwm正负极性”。 2、没有画面
3、开机闪屏 不需要指定:bus-format属性 四、完整代码如下: // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2020 Rockchip Electronics Co., Ltd. * */ /dts-v1/; #include "rk3568-firefly-aioj.dtsi" / { model = "AIO-3568J HDMI (Linux)"; compatible = "rockchip,rk3568-firefly-aioj", "rockchip,rk3568"; vcc3v3_lcd_edp: vcc3v3-lcd-edp { compatible = "regulator-fixed"; gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-name = "vcc3v3_lcd_edp"; regulator-boot-on; regulator-state-mem { regulator-off-in-suspend; }; }; edp_panel: edp-panel { compatible = "simple-panel"; status = "okay"; power-supply = <&vcc3v3_lcd_edp>; enable-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; prepare-delay-ms = <201>; enable-delay-ms = <201>; backlight = <&backlight>; display-timings { native-mode = <&timing0>; timing0: timing0 { clock-frequency = <80000000>; hactive = <1280>; vactive = <800>; hfront-porch = <110>; hsync-len = <10>; hback-porch = <116>; vfront-porch = <13>; vsync-len = <4>; vback-porch = <14>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { panel_in_edp: endpoint { remote-endpoint = <&edp_out_panel>; }; }; }; backlight: backlight { status = "okay"; compatible = "pwm-backlight"; pwms = <&pwm14 0 2000 1>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; default-brightness-level = <200>; }; }; &pwm14 { status = "okay"; }; &edp { status = "okay"; hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; force-hpd; ports { edp_out: port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; edp_out_panel: endpoint@0 { reg = <0>; remote-endpoint = <&panel_in_edp>; }; }; }; }; &route_edp { status = "okay"; connect = <&vp0_out_edp>; }; &edp_phy { status = "okay"; }; &edp_in_vp0 { status = "okay"; }; &edp_in_vp1 { status = "okay"; }; #size-cells = <0>; edp_out_panel: endpoint@0 { reg = <0>; remote-endpoint = <&panel_in_edp>; }; }; }; }; &route_edp { status = "okay"; connect = <&vp0_out_edp>; }; &edp_phy { status = "okay"; }; &edp_in_vp0 { status = "okay"; }; &edp_in_vp1 { status = "okay"; }; |
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