vvvf 程序改变pwm周期问题怎么更改？

前辈好，我在做一个异步电机vvvf程序，设定pwm周期为10K，现在想将pwm周期改变成5k，做了如下更改（设定TBCLK=30MHz，updown计数方式）
EPwm1Regs.TBPRD = 3000;                                     // Period = 2*PeriodMax*TBCLKs开关周期设置   10K频率对应TBPRD=1500，改为5K时，将此对应改为3000
EPwm1Regs.CMPA.half.CMPA = 3000/2;                // 50% duty cycle first 占空比设置
EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Set phase register to zero移相设置
EPwm1Regs.TBCTR = 0x0000; // Clear counter PWM计数器清零
EPwm1Regs.TBCTL.all = 0;
EPwm1Regs.TBCTL.bit.PHSDIR = TB_UP; // Count up after the synchronization event
//同步信号到来计数器装载相位寄存器的值后递增计数
EPwm1Regs.TBCTL.bit.FREE_SOFT = 0; // Free run
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetrical mode计数模式
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Enable phase loading
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // Shadow period register
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Sync flow-though
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;              // TBCLK = SYSCLKOUT/2/1(30M Hz)
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;                      // //TBCLK = SYSCLKOUT/(HSPCLKDIV*CLKDIV)
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Shadow counter-compare A register
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; // Shadow counter-compare B register
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on CTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // Load on CTR=Zero
EPwm1Regs.AQCTLA.all = 0;
EPwm1Regs.AQCTLA.bit.CBU = AQ_NO_ACTION; // Do nothing (action disabled)
EPwm1Regs.AQCTLA.bit.CBD = AQ_NO_ACTION; // Do nothing (action disabled)
EPwm1Regs.AQCTLA.bit.PRD = AQ_NO_ACTION; // Do nothing (action disabled)
EPwm1Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION; // Do nothing (action disabled)
//EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Force EPWM1A low (CTR = CMPA on up-count)上升计数触发时输出低
//EPwm1Regs.AQCTLA.bit.CAD = AQ_SET; // Force EPWM1A high (CTR = CMPA on down-count)下降计数触发时输出高
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Force EPWM1A high (CTR = CMPA on up-count)
EPwm1Regs.AQCTLA.bit.CAD =AQ_CLEAR ; // Force EPWM1A low (CTR = CMPA on down-count)
EPwm1Regs.DBCTL.all = 0;
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // Enable dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active high complementary
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL; // EpwmxA in is source for all
EPwm1Regs.DBRED = 50; // RED = Deadband*TBCLKs(30 correspond to 1uS)死区时间设置
EPwm1Regs.DBFED = 50; // FED = Deadband*TBCLKs(30 correspond to 1uS)
EPwm1Regs.PCCTL.all = 0; // Disable PWM chopper control
//禁止错误联防功能
EALLOW;
EPwm1Regs.TZSEL.all = 0; // Disable TZ1-TZ6 as OSHT and CBC trip source
EPwm1Regs.TZCTL.all = 0; // High impedance on EPWMxA and EPWMxB
EDIS;
//事件触发模块寄存器初始化
EPwm1Regs.ETSEL.all = 0;
EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; // Select INT on PRD event
// EPwm1Regs.ETSEL.bit.SOCAEN = 1; // 使能AD开始转换EPWMxSOCA脉冲
EPwm1Regs.ETPS.all = 0;
EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // 在第一个事件时产生中断

PWM2.PWM3类似设置，主程序中SVPWM的每个开关周期矢量变化角度和开关管动作时间均依照频率的改变做了调整。如下
DELTA_PHASE = (float)(f_real*4096/10000)            
EPwm1Regs.CMPA.half.CMPA = (Uint16)(Pwm1*PWM_CLK*1500*2);     //式子中，PWM_CLK=10e3,即10K Hz；1500为10K时的TBPRD， 改成5K时，对应PWM_CLK=5e3,TBPRD对应改成3000)
EPwm2Regs.CMPA.half.CMPA = (Uint16)(Pwm2*PWM_CLK*1500*2);
EPwm3Regs.CMPA.half.CMPA = (Uint16)(Pwm3*PWM_CLK*1500*2);
改动如上所述，但是改动后，无法得到正常的PWM输出，可以正常采样，但是中断函数中，采样后面部分无法执行。请教以下问题出在那里？