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伙计们,我对SPI配置有问题。这是我为SPIPins configWrite函数和mainloop配置的配置。所以在这种配置下,SCK1管脚上总是有一些脉冲,SDO1上什么也没发生。无法理解问题是什么。任何帮助都将非常感激。
以上来自于百度翻译 以下为原文 Guys, I'm having a problem with the SPI configuration. Here's my config for SPI void Init_SPI(BYTE spi_module) { switch (spi_module) { case SPI1: IEC0bits.SPI1IE = 0; //Disable SPI Interrupts IEC0bits.SPI1TXIE = 0; //Disable SPI TX Interrupt IEC3bits.SPI1RXIE = 0; //Disable SPI RX Interrupt SPI1CON1Lbits.SPIEN = 0; //Disable SPI Module IFS0bits.SPI1IF = 0; //Clear SPI Int Flag IFS0bits.SPI1TXIF = 0; //Clear SPI TX Int Flag IFS3bits.SPI1RXIF = 0; //Clear SPI RX Int Flag IPC2bits.SPI1IP = 1; //Interrupt Priority IPC2bits.SPI1TXIP = 0; //TX Int Priority IPC14bits.SPI1RXIP = 1; //RX Int Priority IEC0bits.SPI1IE = 1; //Enable SPI Interrupts IEC0bits.SPI1TXIE = 0; //Disable SPI TX Interrupt IEC3bits.SPI1RXIE = 1; //Enable SPI RX Interrupt uint16_t i = SPI1BUFL; //Clear buffer #ifdef TX_MODE SPI1CON1Lbits.MSTEN = 1; //Master Mode #elif defined(RX_MODE) SPI1CON1Lbits.MSTEN = 0; //Slave Mode #endif SPI1CON1Lbits.SPISIDL = 1; //Halt Module in Idle Mode SPI1CON1Lbits.DISSDO = 0; //SDO Pin Controlled by the Module SPI1CON1Hbits.AUDEN = 0; //Audio Protocol is Disabled SPI1CON1Lbits.MODE16 = 0; //8-bit Communication Mode SPI1CON1Lbits.MODE32 = 0; //... SPI1CON1Lbits.SMP = 0; //Input Data is Sampled at the Middle of Data Out Time SPI1CON1Lbits.CKE = 0; //Transmit Happens on Transition from Ide clk state to active clk state SPI1CON1Lbits.SSEN = 0; //Not Using SS1 Pin SPI1CON1Lbits.CKP = 1; //Ide State for clk = high, active = low SPI1CON1Lbits.DISSDI = 0; //SDI Pin Controlled by the Module SPI1CON1Lbits.MCLKEN = 0; //PBCLK is Used by the BRG SPI1CON1Lbits.SPIFE = 0; //Frame Sync Pulse Precedes the First Bit Clk SPI1CON1Lbits.ENHBUF = 0; //Enhanced Buffer Mode is Disabled SPI1CON1Hbits.SPISGNEXT = 0; //Data from RX FIFO not Sign-Extended SPI1CON1Hbits.IGNROV = 1; //Receive Overflow is not a Critical Error (data in the FIFO is not Overwritten) SPI1CON1Hbits.IGNTUR = 1; //Transmit Underrun is not a Critical Error SPI1CON1Hbits.AUDMONO = 0; //Not in Use SPI1CON1Hbits.URDTEN = 1; //Transmit SPI1URDT buff during Transmit Underrun SPI1CON1Hbits.AUDMOD = 0b11; //Not in Use SPI1CON1Hbits.FRMEN = 0; //Framed Mode Disabled SPI1CON1Hbits.FRMSYNC = 0; //Frame Sync Pulse Output (Master) - Not in Use SPI1CON1Hbits.FRMPOL = 1; //Frame Sync Pulse = active-high - Not in Use SPI1CON1Hbits.MSSEN = 0; //Slave Select is Disabled SPI1CON1Hbits.FRMSYPW = 0; //Frame Sync Pulse is One Clk Wide - Not in Use SPI1CON1Hbits.FRMCNT = 0b000; //Generates a Frame Sync Pulse on each Serial Word - Not in Use SPI1CON2Lbits.WLENGTH = 0b00000; //See MODE bits SPI1STATLbits.FRMERR = 0; //Clear Frame Error is Detected SPI1BRGLbits.BRG = 0; //BaudRate = Fpb / 2 SPI1IMSKHbits.RXWIEN = 0; //Disable receive buffer element watermark interrupt SPI1IMSKHbits.RXMSK = 0b00000; //RX Buffer Mask SPI1IMSKHbits.TXWIEN = 0; //Disable Transmit Buffer Element Watermark Interrupt SPI1IMSKHbits.TXMSK = 0b00000; //TX Buffer Mask SPI1STATLbits.SPIROV = 0; //Clear SPIROV bit SPI1CON1bits.SPIEN = 1; //Enable SPI1 break; } } Pins config Unlock_PPS(); //SPI1 Module TRIS_SDO1 = TRIS_OUT; TRIS_SDI1 = TRIS_IN; TRIS_SCK1 = TRIS_OUT; // Assign SCK1 to RP17 RPOR8bits.RP17R = _RPOUT_SCK1OUT; // Assign SDO1 to RP16 RPOR8bits.RP16R = _RPOUT_SDO1; // Assign SDI1 to RP30 RPINR20bits.SDI1R = 30; //SPI2 Module TRIS_SDO2 = TRIS_OUT; TRIS_SDI2 = TRIS_IN; TRIS_SCK2 = TRIS_IN; // Assign SCK1 to RP3 RPINR20bits.SCK1R = 3; // Assign SDO2 to RP4 RPOR2bits.RP4R = _RPOUT_SDO2; // Assign SDI2 to RP12 RPINR20bits.SDI1R = 12; Lock_PPS(); Write function void SPI_Write(BYTE spi, unsigned char data) { SPI1BUFL = data; while (SPI1STATLbits.SPITBF); } And main loop void Main_Loop() { while (true) { #ifdef TX_MODE SPI_Write(SPI1, 0x15); Delay_ms(100); #endif } } So with this configuration there are always some impulses on the SCK1 pin and nothing happens on the SDO1. Can't understand what is the problem. Any help would be very appreciated. |
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14个回答
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您需要为SDI1输入/输入设置LATX ANSX。必须设置为数字输入(写入“0”)到该位中。
以上来自于百度翻译 以下为原文 You need to set your Must be set to digital input (write '0' into this bit) |
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尽管将0x15写入SPI1也应该改变SDO1管脚上的位,而不管输入如何。您同时定义了SPI2和SPI1,那么使用SPI2会更好吗?确定PIN不用于USB吗?(UBID),你是否为SDO1尝试了另一种方法?我会交换SDO和SCK进行测试,看看结果是否相同。
以上来自于百度翻译 以下为原文 Though writing 0x15 to SPI1 should also change the bits on the SDO1 pin, regardless of the input. You define both SPI2 and SPI1, does it work better with SPI2 ? Sure the pin is not used for USB ? (USBID), did you try a different one for SDO1 ? I would swap the SDO und SCK for a test and see if the results are the same. // Assign SCK1 to RP17 RPOR8bits.RP17R = _RPOUT_SCK1OUT; // Assign SDO1 to RP16 RPOR8bits.RP16R = _RPOUT_SDO1; |
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我的崔斯怎么了?我有以下的定义:我不打算使用,所以我认为它应该被禁用。还没有测试SPI2。
以上来自于百度翻译 以下为原文 What's wrong with my TRIS? I have the following defines: #define TRIS_SDO1 TRISFbits.TRISF3 #define TRIS_SCK1 TRISFbits.TRISF5 #define TRIS_SDI1 TRISFbits.TRISF2 #define TRIS_SDO2 TRISDbits.TRISD9 #define TRIS_SCK2 TRISDbits.TRISD10 #define TRIS_SDI2 TRISDbits.TRISD11 #define TRIS_IN 1 #define TRIS_OUT 0 I'm not using USBID, so it should be disabled I think. Haven't tested SPI2 yet. |
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好的,我已经把SCK1移动到PIN RF8和SDO1到PIN RF2,但是没用。UPD:好吧,好吧。SPI1现在在主模式下工作。现在我想和类似的图片交流。我把它配置成Slave。所以我改变了:所以,第二个PIC SCK1是输入,MSTN=0。现在,主正在发送一些数据到奴隶在一个循环,但奴隶不会进入中断…
以上来自于百度翻译 以下为原文 //SPI1 Module TRIS_SDO1 = TRIS_OUT; TRIS_SDI1 = TRIS_IN; TRIS_SCK1 = TRIS_IN; //SCK1 to RP15 RPINR20bits.SCK1R = 15; //SDO1 to RP30 RPOR15bits.RP30R = _RPOUT_SDO1; //SDI1 to RP39 RPINR20bits.SDI1R = 39; and SPI1CON1Lbits.MSTEN = 0; //Slave Mode So, on the second PIC SCK1 is input and MSTEN = 0. Now master is sending some data to the slave in a loop, but the slave won't enter the interrupt... |
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我没想到它会起作用,只是想看看问题是否随着引脚一起移动。所以你之前说过你有一个时钟信号,但是在SDO1上没有“发生”。因此,请确认SCK1是否准确地显示了8个脉冲,以及SDO1是否真的连续“0”(或可能是“1”)。如果不能真正测量它,如何测试?我的假设是,在交换之前,你有一个干净的时钟信号,但是一个恒定的SDO1输出。如果您现在交换引脚,我会检查在时钟不再工作时,您是否有0x15值的信号。根据结果,您将知道继续搜索的方向。请描述一下你以前看到的和现在看到的。测试SPI 2是一种类似的方法。不相关:你似乎认为TX和RX从主或从模式。你可能知道这不是直接相关的。从主循环的源代码中,我假设您当前用TXYMODE定义了测试。
以上来自于百度翻译 以下为原文 I did not expect it to work, but to see whether the problem "moves" together with the pin. So you said before that you have a clock signal but nothing "happens" on SDO1. So please confirm whether the SCK1 showed exactly 8 pulses and whether SDO1 really was continously '0' (or may be '1'). If you cannot really measure this, how do you test ? My assumption was that before swapping you have a clean clock signal, but a constant SDO1 output. If you now swap the pins, I would check whether you now have a signal for your 0x15 value, while the clock is not working any longer. Depending on the result, you would know in which direction to continue the search. Just describe what you see before and now. Testing SPI #2 is a similar approach. Not related: you seem to think of TX and RX in terms of master or slave mode. You probably know that this is not directly related. From your source code for the main loop, I assume that you currently test with TX_MODE defined. #ifdef TX_MODE SPI1CON1Lbits.MSTEN = 1; //Master Mode #elif defined(RX_MODE) SPI1CON1Lbits.MSTEN = 0; //Slave Mode #endif |
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我还是不知道问题是什么。现在我可以看到SCK1上的时钟脉冲和使用示波器的SDO1上的数据脉冲。这两个代码完全相同,除了一个配置为主机,另一个配置为Slave。TX_MODE也定义在主机上,RX_MODE定义在从机上。连接是:PIC1 PIC2SDO1(out)-SDI1(in)SDI1(in)-SDO1(out)SCK1(out)-SCK1(in)。
以上来自于百度翻译 以下为原文 I still don't know what the problem was. Now I can see clock impulses on SCK1 and data impulses on SDO1 using an oscilloscope. The code is exactly the same for both PICs except that one is configured as Master and the other one as Slave. Also TX_MODE is defined on Master and RX_MODE on Slave. Connections are: PIC1 PIC2 SDO1(out) - SDI1(in) SDI1(in) - SDO1(out) SCK1(out) - SCK1(in) |
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好的,你刚刚编辑了你的最后一篇文章,而我正在写答案。因为简单地交换引脚无法解决问题,你想分享什么可能帮助其他人有类似的问题?同样,为了完整地查看源代码,不清楚由于问题而更改了什么,也不清楚由于新的从模式任务而更改了什么。你需要更加冗长。同样“类似”PIC是不够的,请详细说明。第二,您对两个PIC都使用完全相同的源码(它们是相同的PIC吗)?唯一不同的是您对TXYMOD/RXYMODE的定义吗?你如何定义它?但是:我告诉过你,你必须照顾ANSX注册卡(至少对于GB4XX家族)。我不能在你的代码或答案中看到这一点。在正确设置之前,没有什么能起作用。
以上来自于百度翻译 以下为原文 Ok, you just edited your last post, while I was writing my answer. Since simply swapping the pins cannot fix the problem, would you like to share what might help others having a similar problem ? Also for having a full view of your source code, it thus is not clear what you have changed due to the problem and what you have changed due to the new slave mode task. You need to be more verbose. Also "similar" PIC is not sufficient, please specify exactly. Second, do you use exactly same source for both PICs (are they identical PICs ) ? Is the only difference your definition of TX_MODE / RX_MODE ? How do you define it? But: I told you that you have to take care of the ANSx register for your input (at least for the GB4xx family). I cannot see that in your code or answer. Nothing will work before you set this correctly. |
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一旦你检查了你的ANSx...请确认你是否换回了原来的引脚.以及你是否使用完全相同的PIC和引脚...你将必须提供源代码,你如何试图接收...
以上来自于百度翻译 以下为原文 Once you checked your ANSx ... Please confirm whether you swapped back to the original pins or not. And whether you use exactly the same PIC and pins ... You will have to supply source code how you try to receive ... |
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事实上,你没有。回到第2帖,你说“LATx”,我想你的意思是“ANSx”,这给OP带来了一些混乱。
以上来自于百度翻译 以下为原文 Actually, you didn't. Back in post#2 you said "LATx", where I think you meant to say "ANSx", which caused a bit of confusion for the OP. :) |
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好的,我添加了ANSX部分,但没有什么变化。这是我的源代码:MIN。cMIN。
以上来自于百度翻译 以下为原文 Ok, I've added ANSx part, but nothing has changed. Here's my source code: Main.C #include #include #include #include "SPI.h" #include "Main.h" #include "Pins.h" #include "Delays.h" /* Configuration Bits */ #pragma config GSS = OFF // General Segment Code Protection Disabled #pragma config BSS = OFF // Boot Segment Code Protection Disabled #pragma config CSS = DIS // Configuration Segment Protection Disabled #pragma config FNOSC = FRCPLL // Oscillator = Fast RC Oscillator with PLL Module #pragma config PLLMODE = PLL8X // 8xPLL #pragma config IESO = ON // Internal External Switchover (Start up device with FRC, then switch to user-selected oscillator source) #pragma config FWDTEN = OFF // Disable Watchdog #pragma config WDTPS = PS32768 // Watchdog Timer Postscaler (1:32,768) #pragma config FWPSA = PR128 // WDT Prescaler (Prescaler ratio of 1:128) #pragma config IOL1WAY = ON // IOLOCK One-Way Set Enable (Once set the IOLOCK bit cannot be cleared) #pragma config ICS = PGx2 // ICD on pins PGEC2/PGED2 #pragma config JTAGEN = OFF // JTAG Disabled #pragma config OSCIOFCN = ON // OSCO/CLKO/RC15 functions as RC15 #pragma config POSCMOD = HS // Fast RC Oscillator with divide-by-n (FRCDIV) #pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock switching and Fail-Safe Clock Monitor are disabled) #pragma config SOSCSEL = ON // SOSC is used in crystal (SOSCI/SOSCO) mode int main() { Initialize(); Main_Loop(); return (EXIT_SUCCESS); } void Main_Loop() { while (true) { #ifdef TX_MODE SPI_Write(SPI1, 0xAB); Delay_ms(50); #endif } } void Initialize() { Init_Pins(); Init_SPI(SPI1); } Main.h #ifndef MAIN_H #define MAIN_H void Main_Loop(); void Initialize(); void Init_Pins(); #define RX_MODE //#define TX_MODE #endif /* MAIN_H */ Spi.c #include #include #include "SPI.h" #include "Pins.h" #include "Main.h" void Init_SPI(BYTE spi_module) { switch (spi_module) { case SPI1: IEC0bits.SPI1IE = 0; //Disable SPI Interrupts IEC0bits.SPI1TXIE = 0; //Disable SPI TX Interrupt IEC3bits.SPI1RXIE = 0; //Disable SPI RX Interrupt SPI1CON1Lbits.SPIEN = 0; //Disable SPI Module IFS0bits.SPI1IF = 0; //Clear SPI Int Flag IFS0bits.SPI1TXIF = 0; //Clear SPI TX Int Flag IFS3bits.SPI1RXIF = 0; //Clear SPI RX Int Flag IPC2bits.SPI1IP = 1; //Interrupt Priority IPC2bits.SPI1TXIP = 0; //TX Int Priority IPC14bits.SPI1RXIP = 1; //RX Int Priority IEC0bits.SPI1IE = 1; //Enable SPI Interrupts IEC0bits.SPI1TXIE = 0; //Disable SPI TX Interrupt IEC3bits.SPI1RXIE = 1; //Enable SPI RX Interrupt uint16_t i = SPI1BUFL; //Clear buffer #ifdef TX_MODE SPI1CON1Lbits.MSTEN = 1; //Master Mode #elif defined(RX_MODE) SPI1CON1Lbits.MSTEN = 0; //Slave Mode #endif SPI1CON1Lbits.SPISIDL = 1; //Halt Module in Idle Mode SPI1CON1Lbits.DISSDO = 0; //SDO Pin Controlled by the Module SPI1CON1Hbits.AUDEN = 0; //Audio Protocol is Disabled SPI1CON1Lbits.MODE16 = 0; //8-bit Communication Mode SPI1CON1Lbits.MODE32 = 0; //... SPI1CON1Lbits.SMP = 0; //Input Data is Sampled at the Middle of Data Out Time SPI1CON1Lbits.CKE = 0; //Transmit Happens on Transition from Ide clk state to active clk state SPI1CON1Lbits.SSEN = 0; //Not Using SS1 Pin SPI1CON1Lbits.CKP = 1; //Ide State for clk = high, active = low SPI1CON1Lbits.DISSDI = 0; //SDI Pin Controlled by the Module SPI1CON1bits.DISSCK = 0; //SCK Pin Controlled by the Module SPI1CON1Lbits.MCLKEN = 0; //PBCLK is Used by the BRG SPI1CON1Lbits.SPIFE = 0; //Frame Sync Pulse Precedes the First Bit Clk SPI1CON1Lbits.ENHBUF = 0; //Enhanced Buffer Mode is Disabled SPI1CON1Hbits.SPISGNEXT = 0; //Data from RX FIFO not Sign-Extended SPI1CON1Hbits.IGNROV = 1; //Receive Overflow is not a Critical Error (data in the FIFO is not Overwritten) SPI1CON1Hbits.IGNTUR = 1; //Transmit Underrun is not a Critical Error SPI1CON1Hbits.AUDMONO = 0; //Not in Use SPI1CON1Hbits.URDTEN = 1; //Transmit SPI1URDT buff during Transmit Underrun SPI1CON1Hbits.AUDMOD = 0b11; //Not in Use SPI1CON1Hbits.FRMEN = 0; //Framed Mode Disabled SPI1CON1Hbits.FRMSYNC = 0; //Frame Sync Pulse Output (Master) - Not in Use SPI1CON1Hbits.FRMPOL = 1; //Frame Sync Pulse = active-high - Not in Use SPI1CON1Hbits.MSSEN = 0; //Slave Select is Disabled SPI1CON1Hbits.FRMSYPW = 0; //Frame Sync Pulse is One Clk Wide - Not in Use SPI1CON1Hbits.FRMCNT = 0b000; //Generates a Frame Sync Pulse on each Serial Word - Not in Use SPI1CON2Lbits.WLENGTH = 0b00000; //See MODE bits SPI1STATLbits.FRMERR = 0; //Clear Frame Error is Detected SPI1BRGLbits.BRG = 8; //BaudRate = Fpb / 2 SPI1IMSKHbits.RXWIEN = 0; //Disable receive buffer element watermark interrupt SPI1IMSKHbits.RXMSK = 0b00000; //RX Buffer Mask SPI1IMSKHbits.TXWIEN = 0; //Disable Transmit Buffer Element Watermark Interrupt SPI1IMSKHbits.TXMSK = 0b00000; //TX Buffer Mask SPI1STATLbits.SPIROV = 0; //Clear SPIROV bit SPI1CON1bits.SPIEN = 1; //Enable SPI1 break; } } void SPI_Write(BYTE spi, unsigned char data) { switch (spi) { case SPI1: SPI1BUFL = data; // write to buffer for TX while (SPI1STATLbits.SPITBF); // wait for transfer complete break; } } unsigned char SPI_Write_Read(BYTE spi, unsigned char data) { switch (spi) { case SPI1: SPI1BUFL = data; // write to buffer for TX while (!SPI1STATLbits.SPIRBF); // wait transfer complete return SPI1BUFL; // read the received value case SPI2: SPI2BUFL = data; // write to buffer for TX while (!SPI2STATLbits.SPIRBF); // wait transfer complete return SPI2BUFL; // read the received value default: return 0xFF; } } unsigned char SPI_Read(BYTE spi) { unsigned char received; switch (spi) { case SPI1: received = SPI_Write_Read(spi, 0xFF); return received; case SPI2: received = SPI_Write_Read(spi, 0xFF); return received; default: return 0xFF; } } void __attribute__((__interrupt__, auto_psv)) _SPI1Interrupt(void) { if (IFS3bits.SPI1RXIF) { unsigned char received = SPI1BUFL; } IFS3bits.SPI1RXIF = 0; } Pins.c #include #include "Pins.h" #include "Main.h" void Init_Pins() { Unlock_PPS(); #ifdef TX_MODE //SPI1 Module TRIS_SDO1 = TRIS_OUT; TRIS_SDI1 = TRIS_IN; TRIS_SCK1 = TRIS_OUT; ANS_SCK1 = DIGITAL; ANS_SDI1 = DIGITAL; ANS_SDO1 = DIGITAL; //SCK1 to RP15 RPOR7bits.RP15R = _RPOUT_SCK1OUT; //SDO1 to RP30 RPOR15bits.RP30R = _RPOUT_SDO1; //SDI1 to RP39 RPINR20bits.SDI1R = 39; #elif defined(RX_MODE) //SPI1 Module TRIS_SDO1 = TRIS_OUT; TRIS_SDI1 = TRIS_IN; TRIS_SCK1 = TRIS_IN; ANS_SCK1 = DIGITAL; ANS_SDI1 = DIGITAL; ANS_SDO1 = DIGITAL; //SCK1 to RP15 RPINR20bits.SCK1R = 15; //SDO1 to RP30 RPOR15bits.RP30R = _RPOUT_SDO1; //SDI1 to RP39 RPINR20bits.SDI1R = 39; #endif Lock_PPS(); } Pins.h #ifndef PINS_H #define PINS_H #include #define Unlock_PPS() __builtin_write_OSCCONL(OSCCON & 0xbf) #define Lock_PPS() __builtin_write_OSCCONL(OSCCON | 0x40) #define SDO1 LATFbits.LATF2 //RP15 #define SCK1 LATFbits.LATF8 //RP15 #define SDI1 LATCbits.LATC2 //RPI39 #define TRIS_SDO1 TRISFbits.TRISF2 #define TRIS_SCK1 TRISFbits.TRISF8 #define TRIS_SDI1 TRISCbits.TRISC2 #define ANS_SDO1 ANSFbits.ANSF2 #define ANS_SCK1 ANSFbits.ANSF8 #define ANS_SDI1 ANSCbits.ANSC2 #define TRIS_IN 1 #define TRIS_OUT 0 #define ANALOG 1 #define DIGITAL 0 #define LOW 0 #define HIGH 1 void Init_Pins(); #endif /* PINS_H */ PIC1 is identical to PIC2. |
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目前,这是你唯一的问题描述:你是如何测试的?这两个图片可能只是简单地重置后,燃烧固件。我会避免任何可能与不干净的启动条件有关的问题,至少在你能收到一个字节之前。只有当按下一个按钮(并且从属设备已经启动并运行)时,才从主机发送一个字节。我猜想你只是坐在你的ISR上的断点上的奴隶?在使用中断之前,我只需检查任何接收到的字节,检查状态寄存器是否有错误。例如,我认为您没有启用适当的中断条件,见SpBiFink(SPIXSIK,中断屏蔽寄存器)。除非你知道如何使用它,否则它只是问题的另一个来源,使测试复杂化。在第一步,你必须检查你的从属PIC是否接收到任何东西,即使它产生错误。比如说,检查奴隶是否真的得到了它的输入时钟。因此,即使是一个SPIROV(接收溢出)将是有趣的(虽然你已经设置了SPI1CON1HBITS。IGROROV=1)。
以上来自于百度翻译 以下为原文 Currently this is your only problem description How are you testing ? Both PICs probably are simply reset after burning the firmware. I would avoid any problems which might be related to unclean start conditions, at least until you can receive a byte. Send a byte from the master only when e.g. a button is pressed (and the slave is already up and running). I assume you are just sitting on a breakpoint in your ISR on the slave ? Before using the interrupts I would simply check for any received byte AND check the status register for any error. E.g. I think you did not enable a proper interrupt condition, see SPIRBFEN (SPIxIMSK, interrupt mask register). Unless you know how to use it, it is just another source of problems and complicates the testing. In the first step you will have to check whether your slave PIC receives anything, even if it generates an error. Let's say, check whether the slave really does get its input clock. Thus even a SPIROV (receive overflow) would be interesting (though you have set SPI1CON1Hbits.IGNROV = 1). |
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虽然不对从设备使用SS控件没有错,但是SCK管脚上的任何杂散转换都将启动从设备接收值,这可能是问题的根源。由于这些位只在适当的SCK转换中被计时,所以很容易使从设备与主设备不同步。使用SS可以确保在主设备的实际SCK脉冲开始时总是重置从设备。
以上来自于百度翻译 以下为原文 While it is not wrong to not use the SS control for the slave, it can be the source of problems in that any stray transition on the SCK pin will start the slave receiving a value. As the bits are clocked in only on the appropriate SCK transition, it is VERY easy to get the slave a bit or two out of sync with the master. Using the SS makes sure that the slave always is reset at the start of the master's real SCK pulses. Susan |
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