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我正在寻找一种加密比特流的方法,然后我找到了efuse。 通过阅读数据表,我知道了Vfs和RFUSE引脚。 编程时,Vfs引脚应上拉至VCC。 我的拉力是如果Vfs改为GND或NC,加密是否仍然有效? 任何文件都详细解释了efuse的方式? 没有移民ug。 感谢您的回复! SXL 以上来自于谷歌翻译 以下为原文 Hi , everyone I am finding a way to encryption the bitstream, then I find the efuse. By reading the datasheet , I know the Vfs and RFUSE pin. When programming , the Vfs pin should be pull up to VCC. My pullze is if the Vfs is changed to GND or NC, does the encryption still work? any document explain the efuse way in detail? No configration ug. Thanks for your reply! SXL |
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如果您可以提及您正在使用的工具版本,那么它将提供有关efuse详细信息的文档。
例如,11.2以后的6系列eFUSE支持仅在以下条件下可用: - 使用的电缆是Platform Cable USB II。 - 电缆连接到USB2.0高速端口。 - 电缆速度为6 MHz。 - OS平台是Windows XP 32位。 仅当满足上述条件时,eFUSE命令才会显示在iMPACT GUI中。 使用批处理模式时,您将看到显示以下消息(必要时)以指示不满足上述条件: - “1”:连接的电缆不支持eFUSE操作。“ - “'1':当电缆连接到USB 1.0端口时,不支持eFUSE操作。请将电缆连接到USB 2.0高速端口,然后重试操作。” - “'1':当前选择的电缆速度不支持eFUSE操作。请将电缆速度设置为6 MHz并重试操作。” - “'1':此OS平台不支持eFUSE操作。目前32位Windows XP支持它。” 请参考以下链接文件 http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_c_introduction_efuse.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_programming_efuse_registers.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_reading_efuse_registers.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_setting_efuse_control_register.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_reading_efuse_control_register.htm 仅供参考:以下基本信息希望您已经知道,但为了更加清晰,这里给出了这些信息。 eFUSE简介:用户可以加密Xilinx软件中的比特流,然后FPGA执行反向操作,解密传入的比特流并在内部重新创建预期的配置。 该方法提供了非常高的设计安全性 FPGA器件系列将内部解密密钥存储在几百位专用RAM中,由外部连接的小型电池供电。 这种电池备份密钥是最安全的解决方案,因为如果FPGA被篡改,密钥将被擦除。 另一种方法是在CMOS中使用可编程熔丝(eFUSE)。 足够数量的eFUSE单元可用于编程和保持密钥。 然后可以在芯片封装后的任何时间对密钥进行编程,消除了不控制密钥的问题。有关efuse编程的更多详细信息,请参阅http://www.xilinx.com/support/documentation/user_guides/ug360 .pdf第107页起 关于eFUSE Premitive: EFUSE_USR原语提供对32个非易失性熔丝的内部访问,这些熔丝可以存储特定于设计的位(例如,与每个设计相关联的唯一ID)。 这些eFUSE必须通过JTAG进行外部编程。 _______________________________________________如果有助于解决您的查询,请将此帖子标记为“接受为解决方案”。 因此,它将有助于其他论坛用户直接参考答案。如果您认为该信息有用且面向答复,请给予此帖子称赞。 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 If you could mention what version of tools you are using then it is give documents about efuse details. For exammple the 6-series eFUSE support in 11.2 onwards is available only on the following conditions: - Cable being used is the Platform Cable USB II. - Cable is connected to a USB2.0 high-speed port. - Cable speed is 6 MHz. - OS platform is Windows XP 32-bit. The eFUSE commands will be shown in the iMPACT GUI only if the above conditions are satisfied. When using the batch mode, you will see the following messages displayed (when necessary) to indicate that the above conditions are not met: - "1': The attached cable does not support eFUSE operations." - "'1': eFUSE operation is not supported when the cable is connected to a USB 1.0 port. Please connect the cable to a USB 2.0 high speed port and retry the operation." - "'1': eFUSE operation is not supported on the currently selected cable speed. Please set the cable speed to 6 MHz and retry the operation." - "'1': eFUSE operation is not supported on this OS platform. It is currently supported on 32-bit Windows XP." Please refer the below link documents http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_c_introduction_efuse.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_programming_efuse_registers.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_reading_efuse_registers.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_setting_efuse_control_register.htm http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/pim_p_reading_efuse_control_register.htm FYI: The below basic information hope you know already but given here for more clarity. eFUSE introduction: The user can encrypt the bit-stream in the Xilinx software, and the FPGA then performs the reverse operation, decrypting the incoming bit-stream and internally recreating the intended configuration. This method provides a very high degree of design security The FPGA device families store the internal decryption keys in a few hundred bits of dedicated RAM, backed up by a small, externally connected battery. This battery backed-up key is the most secure solution since the keys are erased if the FPGA is tampered with. Another method is to use programmable fuses (eFUSEs) in CMOS. A sufficient number of eFUSE cells can be used to program and hold the key. The key can then be programmed at any time after the chip has been packaged, eliminating the problem of not controlling the key.For more details about efuse programming please refer http://www.xilinx.com/support/documentation/user_guides/ug360.pdf page 107 onwards About eFUSE Premitive: The EFUSE_USR primitive provides internal access to the 32 non-volatile fuses that can store bits specific to the design (e.g., a unique ID associated with each design). These eFUSEs must be externally programmed through JTAG. ________________________________________________ Please mark this post as an "Accept as solution" in case if it helped to resolve your query. So that it will help to other forum users to directly refer to the answer. Give kudos to this post in case if you think the information is useful and reply oriented. View solution in original post |
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