Spartan 6 FIR Core Stops在一定时间后产生输出

你好 -
我看到了Spartan 6设计的问题，我在其中实例化了FIR编译器核心。
使用Chipscope，我能够看到输出信号按预期运行，但经过一段时间（10-20秒）后，输出信号变为随机常数值，“准备好数据”信号保持低电平。
不同Spartan 6board上的相同代码（相同的位文件）（相同的FPGA，使用相同的I / O，但安装了不同的备用外设），每次都能产生正确的结果。
我的第一个想法是电源问题（掉电等），但在确定供电范围后，它们非常干净，配置后似乎根本没有下降。
有没有人见过类似FIR滤波器停止响应的地方？
谢谢！！
亚当



以下为原文

Hello -

I'm seeing an issue with a Spartan 6 design where I have a FIR compiler core instantiated.  Using Chipscope, I'm able to see the output signals performing as expected, but after some time (10-20 seconds) the output signal becomes a random constant value and the "ready for data" signal stays low.

The same code (same bit file) on a different Spartan 6 board (same FPGA, same I/O used, but different alternate peripherals installed), produces correct results every time.

My first thought goes to power issues (brown out, etc.), but after scoping the supplies, they are very clean and don't seem to dip at all after configuration.

Has anyone seen anything similar where a FIR filter stops responding?

Thanks!!

Adam