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我正在设计我的第一个斯巴达6 FPGA板。 我对外部振荡器/时钟有几点怀疑。 我浏览了时钟资源指南UG382,但它没有多大帮助,因为它主要描述了FPGA的内部电路,一旦你选择了振荡器就会出现。 Plz帮助我解决这些问题,以便我尽快结束这部分... 1.在频率稳定性,负载电容和负载电流方面,xilinx spartan-6 FPGA的振荡器要求/规格有哪些。 我试过但未找到XILINX评估套件中使用的振荡器的供应商。 2.振荡器可以直接连接到FPGA引脚还是需要中间驱动器? 在任何情况下,您可以给我一个链接,用于在将OScillator连接到FPGA之前使用的电路。 3.我是否需要为FPGA的不同存储区设置不同的时钟/振荡器,或者连接到单个存储体的单个存储体/振荡器是否适用于所有存储体? 4.是否建议使用FPGA的所有存储区? 如果一家银行满足我们的要求; 我们是否仍应向所有银行分配所需数量的IO。 如果我们只使用一个银行..时钟应该送到同一家银行或其他银行。 以上问题可能听起来很愚蠢,但我是初学者所以请和我一起喝啤酒。 P.S ..我已经通过UG382,但无法获得有关上述查询的任何帮助。 非常感谢.. 以上来自于谷歌翻译 以下为原文 Hi I am designing my first spartan 6 FPGA board. I have few doubts related to external oscillator/clock. I went through clock resource guide UG382 but it wasnt of much help as it was mostly describing the inner circuitry of the FPGA, which comes once you have chosen your oscillator. Plz help me with these queries so that I can wind up this part as soon as possible... 1. What are the requirement/ specifications of oscillator for a xilinx spartan-6 FPGA in terms of frequency stability, load capacitance and load current. I tried but failed to locate a supplier for the oscillators used in XILINX evaluation kits. 2. Can oscillator be directly connected to FPGA pins or we need an intermediate driver? In any case can you give me a link for a circuit used before connecting OScillator to FPGA. 3. Do I need to have different clocks/ oscillators for different banks of the FPGA or a single one connected to a single bank will do for all the banks? 4. Is it advised to use all the banks of the FPGA? If one bank fulfill our requirements; should we still distribute required number of IOs to all banks. If we use a single bank only.. should the clock be fed to the same bank or some other bank. Above questions may sound stupid but I am a beginner so please beer with me. P.S.. I have gone through UG382 but couldnt get any help regarding above queries. Thanx a lot.. |
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我在最近的Spartan-6主板上使用了Maxim DS1088LU并取得了很好的成功。
它小而且便宜。 原理图可在www.em.avnet.com/spartan6lx16-evl上找到。 http://www.maxim-ic.com/datasheet/index.mvp/id/4527/t/al 我成功地使用了Maxim部分。 最近,Maxim DS1088器件已经进行了分配,而Maxim的订单处理是“古怪的”。 我建议任何考虑将Maxim部件用于生产目的的人是这样的:在Maxim部件不可用的情况下,总是提供使用备用部件的规定。 当零件不可用时,零件的低成本是很小的舒适度。 2. Maxim DS1088的替代产品是Silicon Labs 500SAA系列。 它们的成本也很低(但不低于Maxim部分,除非你是一个好的谈判者)。 SiLabs部件的美国分销商之一是Avnet(Xilinx的主要美国分销商),这应该是Bryan的心脏。 SiLabs和Maxim振荡器不兼容引脚。 通常很简单,可以在板上为两个部件放置足迹,并根据需要组装任一部分(但不是两者)。 这种方法(部件短缺风险降低)通常适用于可预见的可用性风险的任何部件(例如SPI闪存),其中可获得合适的(但不相同的)替代品。 - 鲍勃埃尔金德 签名:新手的自述文件在这里:http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结:1。 阅读手册或用户指南。 你读过手册了吗? 你能找到手册吗?2。 搜索论坛(并搜索网页)以寻找类似的主题。 不要在多个论坛上发布相同的问题。 不要在别人的主题上发布新主题或问题,开始新的主题!5。 学生:复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。 提供有用的详细信息(请与网页,数据表链接).7。 您的代码中的评论不需要支付额外费用。 我没有支付论坛帖子的费用。 如果我写一篇好文章,那么我一无所获。 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 I've used a Maxim DS1088LU on a recent Spartan-6 board with good success. It's small and inexpensive. Schematics available at www.em.avnet.com/spartan6lx16-evl . http://www.maxim-ic.com/datasheet/index.mvp/id/4527/t/al 1. I've used the Maxim part successfully. Recently the Maxim DS1088 parts have been on allocation, and Maxim order processing is 'quirky'. My advice to anyone considering a Maxim part for production purposes is this: always make provision for using an alternate part in the case that Maxim parts are not available. The low cost of a part is small comfort when the part is not available. 2. An alternative to the Maxim DS1088 is the Silicon Labs 500SAA series. They are also low in cost (but not as low as the Maxim part, unless you are a good negotiator). One of the USA distributors for the SiLabs parts is Avnet (the primary USA distributor for Xilinx), which should warm Bryan's heart. The SiLabs and Maxim oscillators are not pin-compatible. It is usually simple enough to place footprints for both parts on the board, and assemble either part (but not both) as might be necessary. This approach (parts shortage risk reduction) is commonly applied for any parts which may be foreseen as availability risks (e.g. SPI flash memory), where suitable (but not identical) substitutes are available. -- Bob Elkind SIGNATURE: README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369 Summary: 1. Read the manual or user guide. Have you read the manual? Can you find the manual? 2. Search the forums (and search the web) for similar topics. 3. Do not post the same question on multiple forums. 4. Do not post a new topic or question on someone else's thread, start a new thread! 5. Students: Copying code is not the same as learning to design. 6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please). 7. You are not charged extra fees for comments in your code. 8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.View solution in original post |
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难道没有经验丰富的硬件设计师可以向您咨询当地人吗?“...请和我一起喝啤酒。”干杯!
------------------------------------------“如果它不起作用 模拟,它不会在板上工作。“ 以上来自于谷歌翻译 以下为原文 Is there no experienced hardware designer that you can consult local to you? "...please beer with me." Cheers! ------------------------------------------ "If it don't work in simulation, it won't work on the board." |
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不,我没有人咨询:笑脸伤心:........无论如何欢呼!!!!!!!!!!!!!!!!拼写检查!!!
对于啤酒。 我想说BEAR。 以上来自于谷歌翻译 以下为原文 No I dont have anybody to consult :smiley sad:........ anyway cheers!!!!!!!!!!!!!!!!Spell Check!!! for beer. I wanted to say BEAR. |
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好。
一个快速的系统设计教程。 振荡器稳定性取决于您尝试实施的系统要求。 一些通信系统需要高稳定性振荡器。 我们其他人通常使用+/- 100ppm。 负载电容是负载的函数。 我担心你可能会混淆“水晶”和“晶体振荡器”。 不要尝试从水晶中回家制作振荡器。 购买一台保证工作的振荡器。 振荡器的输出标准必须与FPGA的输入标准匹配,例如LVCMOS 3.3V或2.5V.4。 您没有说出您正在设计的FPGA,但通常您可以从“全局时钟引脚”进行分配。 线索在'全球'。 如果您只需要使用1个银行进行I / O,这可能是最好的方法。 通过这种方式,您将获得更少的输出偏差。 除非你违反“同步切换指南”。如果这是你的第一个电路板设计,我祝你好运。 你真的,真的,需要它! ------------------------------------------“如果它不起作用 模拟,它不会在板上工作。“ 以上来自于谷歌翻译 以下为原文 Ok. A quick system design tutorial. 1. The oscillator stability depends on the requirements of the system that you are trying to implement. Some communications systems require high-stability oscillators. The rest of us usually use +/-100ppm. 2. Load capacitance is a function of the load. I fear that you might be confusing "crystal" and "crystal Oscillator". DO NOT try to home-brew an oscillator from just a crystal. BUY AN OSCILLATOR THAT IS GUARANTEED TO WORK. 3. The oscillator's output standard must match that of the FPGA's inputs, for instance LVCMOS 3.3V or 2.5V. 4. You don't say what FPGA you are designing-in, but generally you can distribute all over from a "Global Clock Pin". The clue is in the 'global'. 5. If you only need to use 1 bank for I/O, that's probably the best way to do it. You will get less output skew that way. Unless you breach "Simultaneous Switching Guidelines". If this is your first board design, I wish you good luck. You will really, really, need it! ------------------------------------------ "If it don't work in simulation, it won't work on the board." |
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@rcingham
Thanx很多你的回应。 这真的很有帮助。 以上来自于谷歌翻译 以下为原文 @ rcingham Thanx a lot for your response. It is really helpful. |
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我在最近的Spartan-6主板上使用了Maxim DS1088LU并取得了很好的成功。
它小而且便宜。 原理图可在www.em.avnet.com/spartan6lx16-evl上找到。 http://www.maxim-ic.com/datasheet/index.mvp/id/4527/t/al 我还使用了TI CDCE913,它通过I2C连接提供3个可编程输出到FPGA。 这为Spartan-6提供了非常灵活的基于PLL的高性能时钟。 整体电路稍微贵一点但不算太糟糕(CDCE913器件的价格为1.60美元@ 1K)。 对于此电路,我们使用Kyocera HC49SFWB27000H晶体作为参考。 有关此Spartan-6设计的原理图,请访问www.em.avnet.com/s6microboard。 http://focus.ti.com/docs/prod/folders/print/cdce913.html 布赖恩 以上来自于谷歌翻译 以下为原文 I've used a Maxim DS1088LU on a recent Spartan-6 board with good success. It's small and inexpensive. Schematics available at www.em.avnet.com/spartan6lx16-evl . http://www.maxim-ic.com/datasheet/index.mvp/id/4527/t/al I've also used a TI CDCE913, which provides 3 programmable outputs via an I2C connection to the FPGA. This provides very flexible, PLL-based, high-performance clocks to the Spartan-6. The overall circuit is a little more expensive but not too bad ($1.60 @ 1K for the CDCE913 device). For this circuit we use a Kyocera HC49SFWB27000H crystal for the reference. Schematics for this Spartan-6 design are available at www.em.avnet.com/s6microboard . http://focus.ti.com/docs/prod/folders/print/cdce913.html Bryan |
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我在最近的Spartan-6主板上使用了Maxim DS1088LU并取得了很好的成功。
它小而且便宜。 原理图可在www.em.avnet.com/spartan6lx16-evl上找到。 http://www.maxim-ic.com/datasheet/index.mvp/id/4527/t/al 我成功地使用了Maxim部分。 最近,Maxim DS1088器件已经进行了分配,而Maxim的订单处理是“古怪的”。 我建议任何考虑将Maxim部件用于生产目的的人是这样的:在Maxim部件不可用的情况下,总是提供使用备用部件的规定。 当零件不可用时,零件的低成本是很小的舒适度。 2. Maxim DS1088的替代产品是Silicon Labs 500SAA系列。 它们的成本也很低(但不低于Maxim部分,除非你是一个好的谈判者)。 SiLabs部件的美国分销商之一是Avnet(Xilinx的主要美国分销商),这应该是Bryan的心脏。 SiLabs和Maxim振荡器不兼容引脚。 通常很简单,可以在板上为两个部件放置足迹,并根据需要组装任一部分(但不是两者)。 这种方法(部件短缺风险降低)通常适用于可预见的可用性风险的任何部件(例如SPI闪存),其中可获得合适的(但不相同的)替代品。 - 鲍勃埃尔金德 签名:新手的自述文件在这里:http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结:1。 阅读手册或用户指南。 你读过手册了吗? 你能找到手册吗?2。 搜索论坛(并搜索网页)以寻找类似的主题。 不要在多个论坛上发布相同的问题。 不要在别人的主题上发布新主题或问题,开始新的主题!5。 学生:复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。 提供有用的详细信息(请与网页,数据表链接).7。 您的代码中的评论不需要支付额外费用。 我没有支付论坛帖子的费用。 如果我写一篇好文章,那么我一无所获。 以上来自于谷歌翻译 以下为原文 I've used a Maxim DS1088LU on a recent Spartan-6 board with good success. It's small and inexpensive. Schematics available at www.em.avnet.com/spartan6lx16-evl . http://www.maxim-ic.com/datasheet/index.mvp/id/4527/t/al 1. I've used the Maxim part successfully. Recently the Maxim DS1088 parts have been on allocation, and Maxim order processing is 'quirky'. My advice to anyone considering a Maxim part for production purposes is this: always make provision for using an alternate part in the case that Maxim parts are not available. The low cost of a part is small comfort when the part is not available. 2. An alternative to the Maxim DS1088 is the Silicon Labs 500SAA series. They are also low in cost (but not as low as the Maxim part, unless you are a good negotiator). One of the USA distributors for the SiLabs parts is Avnet (the primary USA distributor for Xilinx), which should warm Bryan's heart. The SiLabs and Maxim oscillators are not pin-compatible. It is usually simple enough to place footprints for both parts on the board, and assemble either part (but not both) as might be necessary. This approach (parts shortage risk reduction) is commonly applied for any parts which may be foreseen as availability risks (e.g. SPI flash memory), where suitable (but not identical) substitutes are available. -- Bob Elkind SIGNATURE: README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369 Summary: 1. Read the manual or user guide. Have you read the manual? Can you find the manual? 2. Search the forums (and search the web) for similar topics. 3. Do not post the same question on multiple forums. 4. Do not post a new topic or question on someone else's thread, start a new thread! 5. Students: Copying code is not the same as learning to design. 6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please). 7. You are not charged extra fees for comments in your code. 8. I am not paid for forum posts. If I write a good post, then I have been good for nothing. |
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@ brayan和bob
thanx的建议。 我会考虑所有这些。 以上来自于谷歌翻译 以下为原文 @ brayan and bob thanx for your suggestions. I will consider all of them. |
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谢谢,鲍勃!
安富利还分销Maxim和TI,因此我们在Xilinx板上使用Maxim,TI和SiLabs产品毫不奇怪。 我将再做一个关于选择时钟部分的(明显的)评论,特别是如果他们正在进行分配。 你可以通过选择奇怪的频率让自己陷入困境,这对于Xilinx FPGA中的PLL来说是完全没必要的,比如Spartan-6。 例如,目前在www.avnetexpress.com上有16 MHz或33.3 MHz DS1088LU部件的库存,分别为4周和2周的交付周期。 所以,简单地说,选择主流振荡器频率,然后在FPGA内合成你真正需要的东西。 布赖恩 以上来自于谷歌翻译 以下为原文 Thanks, Bob! Avnet also distributes Maxim and TI, so no surprise that we use Maxim, TI, and SiLabs stuff on our Xilinx boards. I'll make one more (obvious) comment about choosing a clock part, especially if they are on allocation. You can put yourself in a bind by choosing an oddball frequency, which is completely unnecessary given the PLLs in the Xilinx FPGAs, like Spartan-6. For example, looks like 16 MHz or 33.3 MHz DS1088LU parts are in stock at www.avnetexpress.com right now, with 4- and 2-week lead-times for larger quantities, respectively. So, simply put, choose a mainstream oscillator frequency, then synthesize what you really need inside the FPGA. Bryan |
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