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使用SPartan XC6SLX45时遇到了一些映射问题。 编译器在几个小时后得出这个结论: 阶段11.9本地放置优化器:位置:543 - 由于设计和/或约束的复杂性,此设计不适合此设备中可用的切片数量。 按类型分类的未放置实例:LUTM 400(49.5) 我在寻找关于“LUTM”的更多信息方面遇到了麻烦。 我认为这与“SLICEM”有关,但是这种特殊性和如此明显的短缺是一个谜。 所以我将设备转换为LX75版本,并在几分钟内编译设计: 命令行:map -filter iseconfig / filter.filter -intstyle ise -p xc6slx75-fgg484-3 -w -ol high -xe n -t 1 -xt 0-register_duplication off -global_opt area -equivalent_register_removal on -detail -ir off - ignore_keep_hierarchy -pr i-lc area -power off -o CCD_BASE_map.ncd CCD_BASE.ngd CCD_BASE.pcf目标设备:xc6slx75目标包:fgg484目标速度:-3Mapper版本:spartan6 - $ Revision:1.52 $映射日期:星期三7月28日15: 28:33 2010Design Summary --------------错误数:0警告数:160Slice逻辑利用率:切片寄存器数:93,296中的1,652 1%用作触发器的数量:1,652 用作锁存:0用作Latch-thrus的数字:0用作AND / OR逻辑的数字:0 Slice LUT的数量:46,648中的1,769 3%用作逻辑的数字:46,648中的1,412 3%仅使用O6输出的数字: 414仅使用O5输出的数字:442使用O5和O6的数字:556用作ROM的数字:0用作内存的数字:11,072中的119 1%用作双端口RAM的数字:0 Numbe r用作单端口RAM:0用作移位寄存器的数字:119仅使用O6输出的数字:115仅使用O5输出的数字:0使用O5和O6的数字:4仅用作路径thrus的数字:238具有相同切片的数字 寄存器加载:201带有相同切片进位负载的数字:35带其他负载的数字:2Slice逻辑分布:占用切片数:11,662中的753 6%使用的LUT触发器对数:1,815带未使用触发器的数字:664 超出1,815 36%未使用LUT的数量:1,815中的46%2%完全使用的LUT-FF对的数量:1,815中的1,105 60%独特控制集的数量:88控制集限制丢失的切片寄存器站点数: 这种架构的93,296 1%A LUT触发器对中的401个代表一个LUT与一个片内的一个触发器配对。 控制集是已注册元素的时钟,复位,设置和使能信号的唯一组合。 如果设计被过度映射为非切片资源或放置失败,则切片逻辑分布报告无意义.IO利用率:绑定的IOB数量:230个中的143个51%定位的IOB数量:141个中的141个98 %IOB触发器:65特定功能利用率:RAMB16BWER数量:172个中的97个56%RAMB8BWER数量:344个中的10个2%BUFIO2 / BUFIO2_2CLK数量:32个中的1个3%用作BUFIO2的数量:1个用作数字 BUFIO2_2CLKs:0 BUFIO2FB / BUFIO2FB_2CLK数量:32个中的1个用作BUFIO2FB的3%数量:1用作BUFIO2FB_2CLK的数量:0 BUFG / BUFGMUX数量:16个中的8个50%用作BUFG的数量:8用作BUFGMUX的数量: 0 DCM / DCM_CLKGEN的数量:12个中的0个0%ILOGIC2 / ISERDES2的数量:442中的1个1%用作ILOGIC2的数量:1用作ISERDES2的数量:0 IODELAY2 / IODRP2 / IODRP2_MCB的数量:442中的0 0 0 %OLOGIC2 / OSERDES2的数量:442中的64%14%用作OLOGIC2的数量:64用作OSERDES2s的数量:0 BSCAN数量:4个中的1个25%Numbe BUFHs:38个中的0个0%BUFPLL数量:0个中的0个0%BUFPLL_MCB数量:0个中的0个0%DSP48A1数量:18个中的18个13%ICAP数量:0个来自0 0% MCB数量:4个中的0个0%PCILOGICSE数量:0个中的0%0%PLL_ADV数量:1个中的6个16%PMV数量:0个来自1个0%STARTUP数量:0个来自1个0% SUSPEND_SYNC的数量:非0时的0%非时钟网络的平均扇出:2.86Peak内存使用:500 MB总MAP实现完成时间:1分钟14秒完成MAP完成的总CPU时间:1分钟9秒 遗憾的是,该报告没有在任何地方提及LUTM的使用或资源,但它看起来并不像LX45严重不足以处理任务。 那么,关于为什么会发生这种情况以及如何解决它的任何指针? 任何帮助非常感谢.... 以上来自于谷歌翻译 以下为原文 Hi, Got a few mapping issues with a SPartan XC6SLX45. The compiler reaches this conclusion after several hours: Phase 11.9 Local Placement Optimization ERROR:Place:543 - This design does not fit into the number of slices available in this device due to the complexity of the design and/or constraints. Unplaced instances by type: LUTM 400 (49.5) I'm having sever trouble finding more infor about "LUTM". I would assume it to be related to the "SLICEM" but what makes this so special and in such apparent short supply is a mystery. So I chnaged the device to the LX75 version and the design compiled in minutes: Command Line : map -filter iseconfig/filter.filter -intstyle ise -p xc6slx75-fgg484-3 -w -ol high -xe n -t 1 -xt 0 -register_duplication off -global_opt area -equivalent_register_removal on -detail -ir off -ignore_keep_hierarchy -pr i -lc area -power off -o CCD_BASE_map.ncd CCD_BASE.ngd CCD_BASE.pcf Target Device : xc6slx75 Target Package : fgg484 Target Speed : -3 Mapper Version : spartan6 -- $Revision: 1.52 $ Mapped Date : Wed Jul 28 15:28:33 2010 Design Summary -------------- Number of errors: 0 Number of warnings: 160 Slice Logic Utilization: Number of Slice Registers: 1,652 out of 93,296 1% Number used as Flip Flops: 1,652 Number used as Latches: 0 Number used as Latch-thrus: 0 Number used as AND/OR logics: 0 Number of Slice LUTs: 1,769 out of 46,648 3% Number used as logic: 1,412 out of 46,648 3% Number using O6 output only: 414 Number using O5 output only: 442 Number using O5 and O6: 556 Number used as ROM: 0 Number used as Memory: 119 out of 11,072 1% Number used as Dual Port RAM: 0 Number used as Single Port RAM: 0 Number used as Shift Register: 119 Number using O6 output only: 115 Number using O5 output only: 0 Number using O5 and O6: 4 Number used exclusively as route-thrus: 238 Number with same-slice register load: 201 Number with same-slice carry load: 35 Number with other load: 2 Slice Logic Distribution: Number of occupied Slices: 753 out of 11,662 6% Number of LUT Flip Flop pairs used: 1,815 Number with an unused Flip Flop: 664 out of 1,815 36% Number with an unused LUT: 46 out of 1,815 2% Number of fully used LUT-FF pairs: 1,105 out of 1,815 60% Number of unique control sets: 88 Number of slice register sites lost to control set restrictions: 401 out of 93,296 1% A LUT Flip Flop pair for this architecture represents one LUT paired with one Flip Flop within a slice. A control set is a unique combination of clock, reset, set, and enable signals for a registered element. The Slice Logic Distribution report is not meaningful if the design is over-mapped for a non-slice resource or if Placement fails. IO Utilization: Number of bonded IOBs: 143 out of 280 51% Number of LOCed IOBs: 141 out of 143 98% IOB Flip Flops: 65 Specific Feature Utilization: Number of RAMB16BWERs: 97 out of 172 56% Number of RAMB8BWERs: 10 out of 344 2% Number of BUFIO2/BUFIO2_2CLKs: 1 out of 32 3% Number used as BUFIO2s: 1 Number used as BUFIO2_2CLKs: 0 Number of BUFIO2FB/BUFIO2FB_2CLKs: 1 out of 32 3% Number used as BUFIO2FBs: 1 Number used as BUFIO2FB_2CLKs: 0 Number of BUFG/BUFGMUXs: 8 out of 16 50% Number used as BUFGs: 8 Number used as BUFGMUX: 0 Number of DCM/DCM_CLKGENs: 0 out of 12 0% Number of ILOGIC2/ISERDES2s: 1 out of 442 1% Number used as ILOGIC2s: 1 Number used as ISERDES2s: 0 Number of IODELAY2/IODRP2/IODRP2_MCBs: 0 out of 442 0% Number of OLOGIC2/OSERDES2s: 64 out of 442 14% Number used as OLOGIC2s: 64 Number used as OSERDES2s: 0 Number of BSCANs: 1 out of 4 25% Number of BUFHs: 0 out of 384 0% Number of BUFPLLs: 0 out of 8 0% Number of BUFPLL_MCBs: 0 out of 4 0% Number of DSP48A1s: 18 out of 132 13% Number of ICAPs: 0 out of 1 0% Number of MCBs: 0 out of 4 0% Number of PCILOGICSEs: 0 out of 2 0% Number of PLL_ADVs: 1 out of 6 16% Number of PMVs: 0 out of 1 0% Number of STARTUPs: 0 out of 1 0% Number of SUSPEND_SYNCs: 0 out of 1 0% Average Fanout of Non-Clock Nets: 2.86 Peak Memory Usage: 500 MB Total REAL time to MAP completion: 1 mins 14 secs Total CPU time to MAP completion: 1 mins 9 secs Saddly, the report doesn't mention LUTM usage or resource anywhere but it doesn't exactly look like the LX45 is badly underdesigned to handle the task. SO, any pointers on why this is happening and how to solve it? Any help greatly appreciated.... |
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嗯...我将“RAM Style”参数更改为“Block”,现在好像编译好了。
我仍然可以看到更多有关“LUTM”的详细信息...... 以上来自于谷歌翻译 以下为原文 Hmmm... I changed the "RAM Style" parameter to "Block" and it seems to compile OK now. I'd still ove to see some more details on "LUTM" though... |
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krisverbeeck写道:
嗯...我将“RAM Style”参数更改为“Block”,现在好像编译好了。 我仍然可以看到更多有关“LUTM”的详细信息...... 分布式RAM(与Block RAM相对)在LUTM中实现。 ----------------------------是的,我这样做是为了谋生。 以上来自于谷歌翻译 以下为原文 krisverbeeck wrote:Distributed RAM (as opposed to Block RAM) is implemented in LUTMs. ----------------------------Yes, I do this for a living. |
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这是来自Xilinx的新型FPGA系列的“特性”(莱迪思已经在其中实现了这一目标)
EC系列零件多年)。 新部件的LUT并不能全部用作 分布式内存。 所以你可以设计一个似乎只能填充LUT的设计 你的设备,但有太多的LUTM(内存功能LUT),所以它不适合。 某处 一路走来,有人认为大多数人的使用时间不超过四分之一 他们的LUT作为存储器或移位寄存器,因此它们通过制造减少了硅足迹 一个简单的LUT约3/4的面料。 问候, 的Gabor - Gabor 以上来自于谷歌翻译 以下为原文 This is a "feature" of the newer FPGA families from Xilinx (Lattice has been doing this in its EC series parts for years). The LUT's of the newer parts are not all capable of use as a distributed memory. So you could have a design that seems to only half-fill the LUTs of your device, but has too many LUTM (memory capable LUTs) so it doesn't fit. Somewhere along the way someone decided that most people don't use more than about a quarter of their LUTs as memory or shift registers, so they reduced the silicon footprint by making a simpler LUT for about 3/4 of the fabric. Regards, Gabor -- Gabor |
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我明白了。
我没有得到的是完全没有关于此的文档。 而我所得到的更少的是编辑报告中缺少这一点。 很高兴知道我即将耗尽这些'LUTM',然后编译花费几个小时才产生一个声明一些用完的不起眼的消息。 以上来自于谷歌翻译 以下为原文 I get that. What I don't get is the total lack of documentation about this. And what I get even less is the absence of this in compilation reports. Would be nice to know I'm about to run out of these 'LUTMs' before the compiles spends hours only to generate a nondescript message declaring something ran out. |
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