工作CLC没有信号上的RC4

该程序运行在16F1509。我有一个问题，把它转换成16F1615。不为我工作CLC没有信号上的RC4，我不知道为什么？我做错了什么，但是什么？运行程序16F1509。不执行程序16F1615。[附件= 16F1615YL CLC。zip ]



      以下为原文

   
The program operates on a 16F1509. I have a problem to convert it into 16F1615. Do not work for me CLC does not have the signals on RC4, I do not know why ?? I am doing something wrong but what ??

Running program 16F1509.
// CONFIG1
#pragma config FOSC = INTOSC // Oscillator Selection Bits->INTOSC oscillator: I/O function on CLKIN pin
#pragma config WDTE = OFF // Watchdog Timer Enable->WDT disabled
#pragma config PWRTE = OFF // Power-up Timer Enable->PWRT disabled
#pragma config MCLRE = OFF // MCLR Pin Function Select->MCLR/VPP pin function is digital input
#pragma config CP = OFF // Flash Program Memory Code Protection->Program memory code protection is disabled
#pragma config BOREN = ON // Brown-out Reset Enable->Brown-out Reset enabled
#pragma config CLKOUTEN = OFF // Clock Out Enable->CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#pragma config IESO = ON // Internal/External Switchover Mode->Internal/External Switchover Mode is enabled
#pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable->Fail-Safe Clock Monitor is enabled

// CONFIG2
#pragma config WRT = OFF // Flash Memory Self-Write Protection->Write protection off
#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable->Stack Overflow or Underflow will cause a Reset
#pragma config BORV = LO // Brown-out Reset Voltage Selection->Brown-out Reset Voltage (Vbor), low trip point selected.
#pragma config LPBOR = OFF // Low-Power Brown Out Reset->Low-Power BOR is disabled
#pragma config LVP = OFF // Low-Voltage Programming Enable->Low-voltage programming enabled


#define _XTAL_FREQ 16000000
#include
//#include
//#include
#include

void main(void) {

    OSCCONbits.IRCF = 0b1111; // 16 MHz
    OSCCONbits.SCS = 0b00; // Clock determined by FOSC<2:0> in config

    LATA = 0x00;
    LATB = 0x00;
    LATC = 0x00;
    /** TRISx registers */
    TRISA = 0b00000000;
    TRISB = 0b00000000;
    //TRISC = 0xEF;
    /** ANSELx registers */
    ANSELA = 0b00000000; // zera to I/0, 1 to analog
    ANSELB = 0b00000000; // zera to I/0, 1 to analog
    ANSELC = 0b00000000; // zera to I/0, 1 to analog
    /** WPUx registers */
    WPUA = 0b00000000; //rezys podci do plusa 1-enable 0-disabled
    WPUB = 0b00000000; //rezys podci do plusa 1-enable 0-disabled

    OPTION_REGbits.nWPUEN = 0;
    /** APFCONx registers */
    APFCON = 0x00;
    CM1CON0 = 0b00000000; //kompalatory wyl

    uint8_t j;
    //****************************************************************************
    CLC2GLS0 = 0x20;
    CLC2GLS1 = 0x00;
    CLC2GLS2 = 0x00;
    CLC2GLS3 = 0x00;
    CLC2SEL0 = 0x00;
    CLC2SEL1 = 0x06;
    CLC2POL = 0x0E;
    CLC2CON = 0x82;

    // Register values as copied from CLC Designer Tool
    // PWM1 comes through CLC2
    CLC4GLS0 = 0x02;
    CLC4GLS1 = 0xA4;
    CLC4GLS2 = 0x00;
    CLC4GLS3 = 0x90;
    CLC4SEL0 = 0x54;
    CLC4SEL1 = 0x05;
    CLC4POL = 0x0A;
    CLC4CON = 0xC5;

    // Adjust Timer2 period for desired baud rate
    // One bit period is two Timer2 periods
    T2CON = 0x04;
    PR2 = 2;
    // Adjust PWM1 duty cycle for desired "0" data-bit duty cycle
    // "1" data-bit duty cycle is automatically 50%
    PWM1CON = 0xE0;
    PWM1DCH = 1;
    PWM1DCL = 0x80;
    // MSSP configured for SPI master with Timer2_Period/2 clock, inverted clock
    SSP1CON1 = 0x33;
    // Output on RC4/CLC4
    //TRISC &= 0xEF;
    TRISC = 0b00000000;
    //*****************************************************************************


    __delay_us(60);
    PIR1bits.SSP1IF = 1;

    while (1) {

        // __delay_us ( 100 ) ;
        for (j = 0; j < 200; ++j) {
            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            // SSP1BUF = c;
            SSP1BUF = 255;

            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            SSP1BUF = 0;

            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            SSP1BUF = 0;
        }
        __delay_ms(300);
        for (j = 0; j < 200; ++j) {
            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            // SSP1BUF = c;
            SSP1BUF = 0;

            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            SSP1BUF = 255;
            
            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            SSP1BUF = 0;
        }
        __delay_ms(500);
        for (j = 0; j < 200; ++j) {
            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            SSP1BUF = 255;

            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            SSP1BUF = 255;

            while (!PIR1bits.SSP1IF);
            PIR1bits.SSP1IF = 0;
            SSP1BUF = 255;
        }
        __delay_ms(300);


    }

}
//******************************************************************************


Do not acting program 16F1615.
// CONFIG1
#pragma config FOSC = INTOSC // Oscillator Selection Bits->INTOSC oscillator: I/O function on CLKIN pin
#pragma config WDTE = OFF // Watchdog Timer Enable->WDT disabled
#pragma config PWRTE = OFF // Power-up Timer Enable->PWRT disabled
#pragma config MCLRE = OFF // MCLR Pin Function Select->MCLR/VPP pin function is digital input
#pragma config CP = OFF // Flash Program Memory Code Protection->Program memory code protection is disabled
#pragma config BOREN = ON // Brown-out Reset Enable->Brown-out Reset enabled
#pragma config CLKOUTEN = OFF // Clock Out Enable->CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#pragma config IESO = ON // Internal/External Switchover Mode->Internal/External Switchover Mode is enabled
#pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable->Fail-Safe Clock Monitor is enabled

// CONFIG2
#pragma config WRT = OFF // Flash Memory Self-Write Protection->Write protection off
#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable->Stack Overflow or Underflow will cause a Reset
#pragma config BORV = LO // Brown-out Reset Voltage Selection->Brown-out Reset Voltage (Vbor), low trip point selected.
#pragma config LPBOR = OFF // Low-Power Brown Out Reset->Low-Power BOR is disabled
#pragma config LVP = OFF // Low-Voltage Programming Enable->Low-voltage programming enabled



#define _XTAL_FREQ 16000000
#include
//#include
//#include
#include


void main(void) {
   
    OSCCONbits.IRCF=0b1111; // 16 MHz
    OSCCONbits.SCS=0b00; // Clock determined by FOSC<2:0> in config

    LATA = 0x00;
    LATC = 0x00;
    /** TRISx registers */
    TRISA = 0b00000000;
    //TRISC = 0xEF;
    /** ANSELx registers */
    ANSELA=0b00000000; // zera to I/0, 1 to analog
    ANSELC=0b00000000; // zera to I/0, 1 to analog
    /** WPUx registers */
    WPUA=0b00000000; //rezys podci do plusa 1-enable 0-disabled
    WPUC=0b00000000; //rezys podci do plusa 1-enable 0-disabled

    OPTION_REGbits.nWPUEN = 0;
    /** APFCONx registers */
    //APFCON = 0x00;
    CM1CON0=0b00000000; //kompalator wyl
    CM2CON0=0b00000000; //kompalator wyl
    //ODx registers
    ODCONA = 0x00;
    ODCONC = 0x00;
   
    uint8_t j;

//****************************************************************************
    CLC2GLS0 = 0x20;
    CLC2GLS1 = 0x00;
    CLC2GLS2 = 0x00;
    CLC2GLS3 = 0x00;
    CLC2SEL0 = 0x00;
    CLC2SEL1 = 0x06;
    CLC2POL = 0x0E;
    CLC2CON = 0x82;

    // Register values as copied from CLC Designer Tool
    // PWM1 comes through CLC2
   
    // LC4G1POL not_inverted; LC4G2POL inverted; LC4G3POL not_inverted; LC4G4POL inverted; LC4POL not_inverted;
    CLC4POL = 0x0A;
    // LC4D1S FOSC;
    CLC4SEL0 = 0x21;
  // LC4D2S CCP1 output;
    CLC4SEL1 = 0x0C;
    // LC4D3S SDO from MSSP;
    CLC4SEL2 = 0x28;
    // LC4D4S SCK from MSSP;
    CLC4SEL3 = 0x27;
    // LC4G1D3N disabled; LC4G1D2N disabled; LC4G1D4N disabled; LC4G1D1T enabled; LC4G1D3T disabled; LC4G1D2T disabled; LC4G1D4T disabled; LC4G1D1N disabled;
    CLC4GLS0 = 0x02;
    // LC4G2D2N enabled; LC4G2D1N disabled; LC4G2D4N disabled; LC4G2D3N disabled; LC4G2D2T disabled; LC4G2D1T disabled; LC4G2D4T enabled; LC4G2D3T enabled;
    CLC4GLS1 = 0xA4;
    // LC4G3D1N disabled; LC4G3D2N disabled; LC4G3D3N disabled; LC4G3D4N disabled; LC4G3D1T disabled; LC4G3D2T disabled; LC4G3D3T disabled; LC4G3D4T disabled;
    CLC4GLS2 = 0x00;
    // LC4G4D1N disabled; LC4G4D2N disabled; LC4G4D3N enabled; LC4G4D4N disabled; LC4G4D1T disabled; LC4G4D2T disabled; LC4G4D3T disabled; LC4G4D4T enabled;
    CLC4GLS3 = 0x90;
    CLC4CON = 0xC5;
   
   // Adjust Timer2 period for desired baud rate
    // One bit period is two Timer2 periods
    T2CON = 0x04;
    PR2 = 2;
    // Adjust PWM1 duty cycle for desired "0" data-bit duty cycle
    // "1" data-bit duty cycle is automatically 50%
    CCP1CON = 0x8F;
    CCPR1H = 1;
    CCPR1L = 0x80;
   
    PWM3CON = 0xE0;
    PWM3DCH = 1;
    PWM3DCL = 0x80;
   
    //bool state = GIE;
    GIE = 0;
    PPSLOCK = 0x55;
    PPSLOCK = 0xAA;
    PPSLOCKbits.PPSLOCKED = 0x00; // unlock PPS
    RC4PPS = 0x07; //RC4->CLC4:CLC4OUT;
    PPSLOCK = 0x55;
    PPSLOCK = 0xAA;
    PPSLOCKbits.PPSLOCKED = 0x01; // lock PPS
    //GIE = state;
   
    // MSSP configured for SPI master with Timer2_Period/2 clock, inverted clock
    SSP1CON1 = 0x33;
    // Output on RC4/CLC4
    TRISC &= 0xEF;
    //TRISC=0b00000000;
//*****************************************************************************
   
__delay_us ( 60 ) ;
    PIR1bits.SSP1IF = 1;
   
while(1)
{

   // __delay_us ( 100 ) ;
   for (j = 0; j < 200; ++j)
        {
             while (!PIR1bits.SSP1IF);
             PIR1bits.SSP1IF = 0;
            // SSP1BUF = c;
             SSP1BUF=255;
            
             while (!PIR1bits.SSP1IF);
             PIR1bits.SSP1IF =0;
             SSP1BUF=0;
            
             while (!PIR1bits.SSP1IF);
             PIR1bits.SSP1IF =0;
             SSP1BUF=0;
   }
   }
}
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