在什么阶段，公司可能需要将Xilinx称为Altera技术支持？

L，
通常，如果您的设计在没有警告的情况下完成并且受到适当约束，那么它将起作用（几乎可以肯定）。
这就是为什么我们的设备如此受欢迎！
对于woory来说，没有很多变化，并且没有测试逃生装置。
毫无疑问，这两者都是ASIC / ASSP的严重问题。
我们的可靠性是传奇的（ug116），我们返回的故障要么是无，要么在0到3 ppm的范围内很少。
如上所述，有关详细信息，请致电当地的支持
Austin Lesea主要工程师Xilinx San Jose
在原帖中查看解决方案



以下为原文

l,
 
Generally, if your design completes with no warnings, and is properly constrained, it will work (almost surely).
 
That is why our devices are so popular!
 
There is no lot to lot variation to woory about, and there is no test escape devices.  Both, as you are no doubt aware are serious issues with ASIC/ASSP.
 
Our reliability is legendary (ug116), and our returned failures are either none, or few in the range of 0 to 3 ppm).
 
As above, for details call your local support.
Austin Lesea
Principal Engineer
Xilinx San JoseView solution in original post

嗨，
这是一个广阔的讨论领域。
请联系最近的销售/分销商以获取详细信息。
请参阅以下链接：
http://www.xilinx.com/about/contact/sales-offices.html
http://www.xilinx.com/about/contact/authorized-distributors.html
谢谢，
佳日



以下为原文

Hi,
 
This is vast area of discussion. Please contact nearest Sales/Distributor to get detail information.
Refer below links:
http://www.xilinx.com/about/contact/sales-offices.html
http://www.xilinx.com/about/contact/authorized-distributors.html
 
Thanks,
Yash

嗨@ lis_user1
您需要根据您的设计要求仔细选择设备。
准备好设计要求后，
与您最近的Xilinx销售/分销办事处联系以获取指导。
谢谢，维杰-----------------------------------------------
---------------------------------------------请将帖子标记为
一个答案“接受为解决方案”，以防它有助于解决您的查询。如果一个帖子引导到解决方案，请给予赞誉。



以下为原文

Hi @lis_user1
 
You will need to carefully choose the device based on your design requirement. Once you have the design requirements ready,
get in touch with your nearest Xilinx sales/distribution office for guidance.
Thanks,Vijay
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.

L，
通常，如果您的设计在没有警告的情况下完成并且受到适当约束，那么它将起作用（几乎可以肯定）。
这就是为什么我们的设备如此受欢迎！
对于woory来说，没有很多变化，并且没有测试逃生装置。
毫无疑问，这两者都是ASIC / ASSP的严重问题。
我们的可靠性是传奇的（ug116），我们返回的故障要么是无，要么在0到3 ppm的范围内很少。
如上所述，有关详细信息，请致电当地的支持
Austin Lesea主要工程师Xilinx San Jose



以下为原文

l,
 
Generally, if your design completes with no warnings, and is properly constrained, it will work (almost surely).
 
That is why our devices are so popular!
 
There is no lot to lot variation to woory about, and there is no test escape devices.  Both, as you are no doubt aware are serious issues with ASIC/ASSP.
 
Our reliability is legendary (ug116), and our returned failures are either none, or few in the range of 0 to 3 ppm).
 
As above, for details call your local support.
Austin Lesea
Principal Engineer
Xilinx San Jose

谢谢你们。
我并不担心设备的可靠性，而是我们设备选择中X和A的本地存在的重要性。
在我的区域，onehas有一个设计中心，但其他人没有。
如果支持不重要那么我们将更乐意不限制我们的设备选择。



以下为原文

Thank you all. 
 
I am not worrying about the reliability of the device but rather the significance of the local presense of X and A in our device choices. 
In my district one has a design center but the other doesn't. 
If support is of little importance then we will be happier not limiting our choices of device. 
 
 

我如何标记为已关闭？



以下为原文

How do I mark as Closed?

L，
老实说，如果您使用千兆位收发器，设计中心是有价值的：如果该中心配备了测试设备，它可能证明是有用的。
当然，您可能已经拥有该设备，或者可以租用它，但您可能没有信号完整性专家，因为配备收发器专家的设计中心可能就是这种情况。
因此，如果您是第一次使用收发器，那么本地中心可能会有优势。
然而，这是一个响应时间的问题，因为我知道Xilinx有专家（就在这里的论坛），所以即使有一个中心，第一个答案在这里答案最快。
Austin Lesea主要工程师Xilinx San Jose



以下为原文

l,
 
Honestly, a design center is of value if you are using the gigabit transceivers:  if that center is equipped with the test equipment, it may prove to be useful.  Of course, you may have that equipment already, or be able to rent it, but you may not have signal integrity experts close at hand as might be the case with a transceiver expert equipped design center.
 
So, if you are using the transceivers for the first time, there may be an edge with the local center.
 
However, it is a matter of response time, as I know that Xilinx has experts (right here in the forums) so even if there is a center, the first answer is fastest answered right here.
Austin Lesea
Principal Engineer
Xilinx San Jose