没有微处理器的FPGA之间的总线？

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imgignacio wrote:
Hello everyone,
 
when using the IP cores for communication buses, for instance the bus CAN, the user interface is something like this:
 

 

The module has in its interior a set of configuration registers, an interruption line... If I had to use such core, I would implement a "decaffeinated" MicroBlaze and use its drivers to handle the communication through the bus with the core.

 

I wanted to ask if this is the most common approach for using this kind of modules for communication buses or if in any case it is recommended to handle them without any microprocessor.

 

答案对人有帮助，有参考价值 0

imgignacio wrote:
Hello everyone,
 
when using the IP cores for communication buses, for instance the bus CAN, the user interface is something like this:
 

 

The module has in its interior a set of configuration registers, an interruption line... If I had to use such core, I would implement a "decaffeinated" MicroBlaze and use its drivers to handle the communication through the bus with the core.

 

I wanted to ask if this is the most common approach for using this kind of modules for communication buses or if in any case it is recommended to handle them without any microprocessor.