怎么使用SOSC作为RTCC时钟源

我使用了你的发布代码，只修改了时间和闹钟值，在ISR中增加了代码亮起，其他PalCE从不修改。我希望程序在十秒后进入TytCcCutt，然后灯亮，但是程序没有进入中断。所以我猜RTCC没有运行，IH。AAVE在两个开发板上测试程序，得到相同的结果。我犯了一些错误吗？下面是完整的代码：



      以下为原文

    I used your posted code,only modified the time and the alarm valueconst RTCC_TimeOfDay_t Datum_TOD = {{0x0017, 0x0518, 0x0410, 0x1000}};
const RTCC_TimeOfDay_t Datum_Alarm = {{0x0017, 0x0518, 0x0410, 0x1010}};
And in ISR I add codes make light on,other palce never modified.
void __attribute__((__interrupt__, no_auto_psv)) _RTCCInterrupt(void)
{
    _RTCIF = 0; /* Clear RTCC Interrupt Flag */
    TRISGbits.TRISG15=0;
    LATGbits.LATG15=0;
}

I want the program go into the RTCCInterrupt after ten seconds,then the light will be on,but the program didn't go into the interrupt.So I guess the RTCC not running, I have tested the program in two development boards,and get the same results.Have i made some mistake？The following is the complete codes:#pragma config GWRP = OFF, GSS = OFF, GSSK = OFF
#pragma config FNOSC = FRC, IESO = OFF
#pragma config POSCMD = NONE, OSCIOFNC = ON, IOL1WAY = OFF, FCKSM = CSECMD
#pragma config WDTPOST = PS32768, WDTPRE = PR128, PLLKEN = OFF, WINDIS = OFF, FWDTEN = OFF
#pragma config FPWRT = PWR128, BOREN = OFF, ALTI2C1 = OFF, ALTI2C2 = OFF
#pragma config ICS = PGD1, RSTPRI = PF, JTAGEN = OFF
#pragma config AWRP = OFF, APL = OFF, APLK = OFF

#include "xc.h"

/*
 * Define the target system clock frequency.
 *
 * The initialization MUST set the system clock to support these definitions.
 *
 */
/* Setup the clock to run at about 60 MIPS (59,881,250Hz) */
#define FPRI (7370000L) /* Primary oscillator frequency */
#define PLL_N1 (2L) /* PLLPRE CLKDIV<4:0> range 2 to 33 */
#define PLL_M (65) /* PLLDIV PLLFBD<8:0> range 2 to 513 */
#define PLL_N2 (2L) /* PLLPOST CLKDIV<7:6> range 2, 4 or 8 */
#define FSYS (FPRI*PLL_M/(PLL_N1*PLL_N2))
#define FCYC (FSYS/2L)
/*
 * Global types
 */
typedef union {
    struct {
        unsigned int YY;
        unsigned int MMDD;
        unsigned int WWHH;
        unsigned int MMSS;
    };
    struct {
        unsigned char BCD_Year;
        unsigned char BCD_reserved;
        unsigned char BCD_Day;
        unsigned char BCD_Month;
        unsigned char BCD_Hours;
        unsigned char BCD_DayOfWeek;
        unsigned char BCD_Seconds;
        unsigned char BCD_Minutes;
    };
} RTCC_TimeOfDay_t;
/*
 * Global constant data
 */
const unsigned long gInstructionCyclesPerSecond = FCYC;

/* define map input pin numbers */
enum
{
    RPI_NONE = 0,
    RPI_C1OUT = 1,
    RPI_C2OUT = 2,
    RPI_C3OUT = 3,
    RPI_FINDX1 = 8,
    RPI_FHOME1 = 9,
    RPI_FINDX2 = 10,
    RPI_FHOME2 = 11,
    RPI_RA0 = 16,
    RPI_RA1 = 17,
    RPI_RA2 = 18,
    RPI_RA3 = 19,
    RPI_RA4 = 20,
    RPI_RA5 = 21,
    RPI_RA6 = 22,
    RPI_RA7 = 23,
    RPI_RA14 = 30,
    RPI_RA15 = 31,
    RPI_RB0 = 32,
    RPI_RB1 = 33,
    RPI_RB2 = 34,
    RPI_RB3 = 35,
    RPI_RB4 = 36,
    RPI_RB5 = 37,
    RPI_RB6 = 38,
    RPI_RB7 = 39,
    RPI_RB8 = 40,
    RPI_RB9 = 41,
    RPI_RB10 = 42,
    RPI_RB11 = 43,
    RPI_RB12 = 44,
    RPI_RB13 = 45,
    RPI_RB14 = 46,
    RPI_RB15 = 47,
    RPI_RC1 = 49,
    RPI_RC2 = 50,
    RPI_RC3 = 51,
    RPI_RC4 = 52,
    RPI_RC12 = 60,
    RPI_RC13 = 61,
    RPI_RC14 = 62,
    RPI_RD0 = 64,
    RPI_RD1 = 65,
    RPI_RD2 = 66,
    RPI_RD3 = 67,
    RPI_RD4 = 68,
    RPI_RD5 = 69,
    RPI_RD6 = 70,
    RPI_RD7 = 71,
    RPI_RD8 = 72,
    RPI_RD9 = 73,
    RPI_RD10 = 74,
    RPI_RD11 = 75,
    RPI_RD12 = 76,
    RPI_RD13 = 77,
    RPI_RD14 = 78,
    RPI_RD15 = 79,
    RPI_RE0 = 80,
    RPI_RE2 = 82,
    RPI_RE4 = 84,
    RPI_RE5 = 85,
    RPI_RE7 = 87,
    RPI_RE1 = 81,
    RPI_RE3 = 83,
    RPI_RE6 = 86,
    RPI_RE8 = 88,
    RPI_RE9 = 89,
    RPI_RF0 = 96,
    RPI_RF1 = 97,
    RPI_RF2 = 98,
    RPI_RF3 = 99,
    RPI_RF4 = 100,
    RPI_RF5 = 101,
    RPI_RF8 = 104,
    RPI_RF12 = 108,
    RPI_RF13 = 109,
    RPI_RG0 = 112,
    RPI_RG1 = 113,
    RPI_RG6 = 118,
    RPI_RG7 = 119,
    RPI_RG8 = 120,
    RPI_RG9 = 121,
    RPI_RG13 = 125,
    RPI_RG12 = 124,
    RPI_RG14 = 126,
    RPI_RG15 = 127,
};
    
/* define map output function numbers */
enum
{
    RPO_NONE = 0b000000, /* Default Pin */
    RPO_U1TX = 0b000001, /* UART1 Transmit */
    RPO_U1RTS = 0b000010, /* UART1 Ready-to-Send */
    RPO_U2TX = 0b000011, /* UART2 Transmit */
    RPO_U2RTS = 0b000100, /* UART2 Ready-to-Send */
    RPO_SDO1 = 0b000101, /* SPI1 Data Output */
    RPO_SCK1 = 0b000110, /* SPI1 Clock Output */
    RPO_SS1 = 0b000111, /* SPI1 Slave Select */
    RPO_SS2 = 0b001010, /* SPI2 Slave Select */
    RPO_CSDO = 0b001011, /* DCI Data Output */
    RPO_CSCK = 0b001100, /* DCI Clock Output */
    RPO_COFS = 0b001101, /* DCI FSYNC Output */
    RPO_C1TX = 0b001110, /* CAN1 Transmit */
    RPO_C2TX = 0b001111, /* CAN2 Transmit */
    RPO_OC1 = 0b010000, /* Output Compare 1 Output */
    RPO_OC2 = 0b010001, /* Output Compare 2 Output */
    RPO_OC3 = 0b010010, /* Output Compare 3 Output */
    RPO_OC4 = 0b010011, /* Output Compare 4 Output */
    RPO_OC5 = 0b010100, /* Output Compare 5 Output */
    RPO_OC6 = 0b010101, /* Output Compare 6 Output */
    RPO_OC7 = 0b010110, /* Output Compare 7 Output */
    RPO_OC8 = 0b010111, /* Output Compare 8 Output */
    RPO_C1OUT = 0b011000, /* Comparator Output 1 */
    RPO_C2OUT = 0b011001, /* Comparator Output 2 */
    RPO_C3OUT = 0b011010, /* Comparator Output 3 */
    RPO_U3TX = 0b011011, /* UART3 Transmit */
    RPO_U3RTS = 0b011100, /* UART3 Ready-to-Send */
    RPO_U4TX = 0b011101, /* UART4 Transmit */
    RPO_U4RTS = 0b011110, /* UART4 Ready-to-Send */
    RPO_SDO3 = 0b011111, /* SPI3 Data Output */
    RPO_SCK3 = 0b100000, /* SPI3 Clock Output */
    RPO_SS3 = 0b100001, /* SPI3 Slave Select */
    RPO_SDO4 = 0b100010, /* SPI4 Data Output */
    RPO_SCK4 = 0b100011, /* SPI4 Clock Output */
    RPO_SS4 = 0b100100, /* SPI4 Slave Select */
    RPO_OC9 = 0b100101, /* Output Compare 9 Output */
    RPO_OC10 = 0b100110, /* Output Compare 10 Output */
    RPO_OC11 = 0b100111, /* Output Compare 11 Output */
    RPO_OC12 = 0b101000, /* Output Compare 12 Output */
    RPO_OC13 = 0b101001, /* Output Compare 13 Output */
    RPO_OC14 = 0b101010, /* Output Compare 14 Output */
    RPO_OC15 = 0b101011, /* Output Compare 15 Output */
    RPO_OC16 = 0b101100, /* Output Compare 16 Output */
    RPO_SYNCO1 = 0b101101, /* PWM Primary Time Base Sync Output */
    RPO_SYNCO2 = 0b101110, /* PWM Secondary Time Base Sync Output */
    RPO_QEI1CCMP = 0b101111, /* QEI 1 Counter Comparator Output */
    RPO_QEI2CCMP = 0b110000, /* QEI 2 Counter Comparator Output */
    RPO_REFCLK = 0b110001, /* Reference Clock Output */
};
    
/* Initialize this PIC */
void Init_PIC(void)
{
    unsigned int ClockSwitchTimeout;

    /*
    ** Disable all interrupt sources
    */
    __builtin_disi(0x3FFF); /* disable interrupts for 16383 cycles */
    IEC0 = 0;
    IEC1 = 0;
    IEC2 = 0;
    IEC3 = 0;
    IEC4 = 0;
    IEC5 = 0;
    IEC7 = 0;
    IEC8 = 0;
    __builtin_disi(0x0000); /* enable interrupts */
    
    /*
     * At Power On Reset the configuration words set the system clock
     * to use the FRC oscillator. At this point we need to enable the
     * PLL to get the system clock running at 32MHz.
     *
     * Clock switching on the 24FJ family with the PLL can be a bit tricky.
     *
     * First we need to check if the configuration words enabled clock
     * switching at all, then turn off the PLL, then setup the PLL and
     * finally enable it. Sounds simple, I know. Make sure you verify this
     * clock setup on the real hardware.
     */
    if(!OSCCONbits.CLKLOCK) /* if primary oscillator switching is unlocked */
    {
        /* Initiate Clock Switch to FRC oscillator (NOSC=0b000) */
        __builtin_write_OSCCONH(0x00);

        /* start clock switch */
        __builtin_write_OSCCONL(OSCCON | _OSCCON_OSWEN_MASK);
        
        /* wait, with timeout, for clock switch to complete */
        for(ClockSwitchTimeout=10000; --ClockSwitchTimeout && OSCCONbits.OSWEN;);

        /* Configure PLL prescaler, PLL postscaler, PLL divisor */
        PLLFBD=PLL_M-2;
#if PLL_N2==2
        CLKDIVbits.PLLPOST=0; /* N2=2 */
#elif PLL_N2==4
        CLKDIVbits.PLLPOST=1; /* N2=4 */
#elif PLL_N2==8
        CLKDIVbits.PLLPOST=3; /* N2=8 */
#else
#error invalid PLL_N2 paramenter
#endif
        CLKDIVbits.PLLPRE=PLL_N1-2; /* N1=2 */

        /* Initiate Clock Switch to FRC oscillator with PLL (NOSC=0b001) */
        __builtin_write_OSCCONH(0x01);

        /* start clock switch */
        __builtin_write_OSCCONL(OSCCON | _OSCCON_OSWEN_MASK);

        /* wait, with timeout, for clock switch to complete */
        for(ClockSwitchTimeout=10000; --ClockSwitchTimeout && OSCCONbits.OSWEN;);

        /* wait, with timeout, for the PLL to lock */
        for(ClockSwitchTimeout=10000; --ClockSwitchTimeout && !OSCCONbits.LOCK;);
    }

    /* make all inputs digital I/O */
    ANSELA = 0x0000; /* Set for digital I/O */
    ANSELB = 0x0000; /* Set for digital I/O */
    ANSELC = 0x0000; /* Set for digital I/O */
    ANSELD = 0x0000; /* Set for digital I/O */
    ANSELE = 0x0000; /* Set for digital I/O */
    ANSELG = 0x0000; /* Set for digital I/O */
    
    CM1CON = 0x0000;
    CM2CON = 0x0000;
    CM3CON = 0x0000;
    
    _NSTDIS = 1; /* disable interrupt nesting */
        
    TRISA = 0xFFFF;
    TRISB = 0xFFFF;
    TRISC = 0xFFFF;
    TRISD = 0xFFFF;
    TRISE = 0xFFFF;
    TRISF = 0xFFFF;
    TRISG = 0xFFFF;
    
    /* Unlock Registers */
    __builtin_write_OSCCONL(OSCCON & 0xBF);
    
    /* map all inputs */
    _INT1R = RPI_NONE;
    _INT2R = RPI_NONE;
    _INT3R = RPI_NONE;
    _INT4R = RPI_NONE;
    _T2CKR = RPI_NONE;
    _T3CKR = RPI_NONE;
    _T4CKR = RPI_NONE;
    _T5CKR = RPI_NONE;
    _T6CKR = RPI_NONE;
    _T7CKR = RPI_NONE;
    _T8CKR = RPI_NONE;
    _T9CKR = RPI_NONE;
    _IC1R = RPI_NONE;
    _IC2R = RPI_NONE;
    _IC3R = RPI_NONE;
    _IC4R = RPI_NONE;
    _IC5R = RPI_NONE;
    _IC6R = RPI_NONE;
    _IC7R = RPI_NONE;
    _IC8R = RPI_NONE;
    _OCFAR = RPI_NONE;
    _OCFBR = RPI_NONE;
    _FLT1R = RPI_NONE;
    _FLT2R = RPI_NONE;
    _FLT3R = RPI_NONE;
    _FLT4R = RPI_NONE;
    _QEA1R = RPI_NONE;
    _QEB1R = RPI_NONE;
    _INDX1R = RPI_NONE;
    _HOME1R = RPI_NONE;
    _QEA2R = RPI_NONE;
    _QEB2R = RPI_NONE;
    _INDX2R = RPI_NONE;
    _HOME2R = RPI_NONE;
    _U1RXR = RPI_NONE;
    _U1CTSR = RPI_NONE;
    _U2RXR = RPI_NONE;
    _U2CTSR = RPI_NONE;
    _SDI1R = RPI_NONE;
    _SCK1R = RPI_NONE;
    _SS1R = RPI_NONE;
    _SS2R = RPI_NONE;
    _CSDIR = RPI_NONE;
    _CSCKR = RPI_NONE;
    _COFSR = RPI_NONE;
    _C1RXR = RPI_NONE;
    _C2RXR = RPI_NONE;
    _U3RXR = RPI_NONE;
    _U3CTSR = RPI_NONE;
    _U4RXR = RPI_NONE;
    _U4CTSR = RPI_NONE;
    _SDI3R = RPI_NONE;
    _SCK3R = RPI_NONE;
    _SS3R = RPI_NONE;
    _SDI4R = RPI_NONE;
    _SCK4R = RPI_NONE;
    _SS4R = RPI_NONE;
    _IC9R = RPI_NONE;
    _IC10R = RPI_NONE;
    _IC11R = RPI_NONE;
    _IC12R = RPI_NONE;
    _IC13R = RPI_NONE;
    _IC14R = RPI_NONE;
    _IC15R = RPI_NONE;
    _IC16R = RPI_NONE;
    _OCFCR = RPI_NONE;
    _FLT5R = RPI_NONE;
    _FLT6R = RPI_NONE;
    _FLT7R = RPI_NONE;
    _DTCMP1R = RPI_NONE;
    _DTCMP2R = RPI_NONE;
    _DTCMP3R = RPI_NONE;
    _DTCMP4R = RPI_NONE;
    _DTCMP5R = RPI_NONE;
    _DTCMP6R = RPI_NONE;
    _DTCMP7R = RPI_NONE;
    _SYNCI1R = RPI_NONE;
    _SYNCI2R = RPI_NONE;

    /* map all outputs */
    _RP64R = RPO_NONE; /* RD0 */
    _RP65R = RPO_NONE; /* RD1 */
    _RP66R = RPO_NONE; /* RD2 */
    _RP67R = RPO_NONE; /* RD3 */
    _RP68R = RPO_NONE; /* RD4 */
    _RP69R = RPO_NONE; /* RD5 */
    _RP70R = RPO_NONE; /* RD6 */
    _RP71R = RPO_NONE; /* RD7 */
    _RP79R = RPO_NONE; /* RD15 */
    _RP80R = RPO_NONE; /* RE0 */
    _RP82R = RPO_NONE; /* RE2 */
    _RP84R = RPO_NONE; /* RE4 */
    _RP85R = RPO_NONE; /* RE5 */
    _RP87R = RPO_NONE; /* RE7 */
    _RP96R = RPO_NONE; /* RF0 */
    _RP97R = RPO_NONE; /* RF1 */
    _RP98R = RPO_NONE; /* RF2 */
    _RP99R = RPO_NONE; /* RF3 */
    _RP100R = RPO_NONE; /* RF4 */
    _RP101R = RPO_NONE; /* RF5 */
    _RP104R = RPO_NONE; /* RF8 */
    _RP108R = RPO_NONE; /* RF12 */
    _RP109R = RPO_NONE; /* RF13 */
    _RP112R = RPO_NONE; /* RG0 */
    _RP113R = RPO_NONE; /* RG1 */
    _RP118R = RPO_NONE; /* RG6 */
    _RP120R = RPO_NONE; /* RG8 */
    _RP125R = RPO_NONE; /* RG13 */
    _RP126R = RPO_NONE; /* RG14 */
    _RP127R = RPO_NONE; /* RG15 */
    
    /* Lock Registers */
    __builtin_write_OSCCONL(OSCCON | 0x40);
}

/* warning non-portable function */
/*
 * This function waits for the at least the
 * specified number milliseconds then returns.
 */
void delay( unsigned int wait_ms )
{
    register unsigned int temp = wait_ms;
    if(temp) do
    {
        asm(" repeat %0 n"
            " clrwdt n"
            " repeat %0 n"
            " clrwdt n"
            " repeat %0 n"
            " clrwdt n"
            " repeat %0 n"
            " clrwdt n"
            : /* no outputs */
            : "r" (FCYC/4/1000-3)
            );
    } while(--temp);
}
/*
 * Initialize Real Time Clock Calander module
 */
void Init_RTCC(const RTCC_TimeOfDay_t *Current, const RTCC_TimeOfDay_t *Alarm)
{
    /*
     * There is a potential conflict with Auxiliary Clock Generation.
     *
     * The Auxiliary Clock Generation must use another clock
     * source when TIMER1 uses the the secondary oscillator
     * as the low power oscillator oscillator.
     */
    _RTCIE = 0; /* Disable RTCC alarm interrupt */
    _RTCIP = 4; /* Set RTCC alarm interrupt priority */
    /* Turn in Low Power Oscillator connected to RC13,RC14 (PGD2,PGC2) */
    __builtin_write_OSCCONL(OSCCON | 2);

    /* enable write to the RTCC */
    asm volatile(
        " disi #5n" /* disable interrupts for 5 cycles */
        " mov #0x55, w0n" /* write first step of unlock sequence */
        " mov w0,_NVMKEYn"
        " mov #0xAA, w1n" /* write second step of unlock sequence */
        " mov w1,_NVMKEYn"
        " bset %[REG],#%[BIT]n" /* set the RTCWREN bit to unlock writes ro the RTCC */
        : /* no outputs */
        : [REG]"U"(RCFGCAL),[BIT]"i"(_RCFGCAL_RTCWREN_POSITION)
        : "w0", "w1" /* clobbers these working registers */
        );
    _RTCEN = 1; /* enable the RTCC module */
    if(Current)
    {
        _RTCPTR = 0b11; /* set the RTCC Value register window to Year */
        RTCVAL = Current->YY & 0x00FF;
        RTCVAL = Current->MMDD;
        RTCVAL = Current->WWHH;
        RTCVAL = Current->MMSS;
    }

    if(Alarm)
    {
        /* disable alarm and set alarm register pointer to Month and Day */
        ALCFGRPT = (0b10<<_ALCFGRPT_ALRMPTR_POSITION);
        ALRMVAL = Alarm->MMDD;
        ALRMVAL = Alarm->WWHH;
        ALRMVAL = Alarm->MMSS;
    }

    /* enable and alarm every one second */
    ALCFGRPT = ALCFGRPT | (0b0001<<_ALCFGRPT_AMASK_POSITION)
                        | (1<<_ALCFGRPT_CHIME_POSITION)
                        | (1<<_ALCFGRPT_ALRMEN_POSITION);

    _RTCWREN = 0; /* lock the RTCC, no more writes */

    _RTCIF = 0; /* Clear RTCC alarm interrupt assertion */
    _RTCIE = 1; /* Enable RTCC alarm interrupt */
}
/*
 * Power on rest values for RTCC
 */
const RTCC_TimeOfDay_t Datum_TOD = {{0x0017, 0x0518, 0x0410, 0x1000}};
const RTCC_TimeOfDay_t Datum_Alarm = {{0x0017, 0x0518, 0x0410, 0x1010}};
/*
 * Application start
 */
int main(void)
{
    Init_PIC();
    Init_RTCC(&Datum_TOD, &Datum_Alarm);

    /* Application loop */
    for(;;)
    {
    }
    return 0;
}
/*
 * Handle RTCC interrupt
 */
void __attribute__((__interrupt__, no_auto_psv)) _RTCCInterrupt(void)
{
    _RTCIF = 0; /* Clear RTCC Interrupt Flag */
    TRISGbits.TRISG15=0;
    LATGbits.LATG15=0;
}

你如何确定它没有进入ISR？通过LED，或通过断点？如果前者，尝试后者。



      以下为原文

    How are you determining it's not getting to the ISR?  Via an LED, or via a breakpoint?  If the former, try the latter.

我都试过了，程序没有进入ISR。



      以下为原文

    Both I have tried,the program not getting to the ISR.

看来你们所有的PIC24EP512GU810都是以同样的方式被破坏，或者你们做的事情会导致我的代码不能安装SOSC振荡器。你们正在做的事情是你们失败的最有可能的原因。直到你们更好地描述你们正在做的事情。几乎没有人能为你解决这个问题。已知的代码在至少两种不同类型的开发板中工作。你的任务是证明YouLRA技术网关开发板是功能性的，SSOC 32.768千赫晶体振荡器运行。



      以下为原文

   
Its seems that all of your PIC24EP512GU810 are broken in the same way or you are doing something that will cause my code to fail to setup the SOSC oscillator.
 
That you are doing something is the most likely reason for your failures.
 
Until you get a lot better at describing what you are doing there is almost no chance that anyone can figure it out for you.
 
The code posted in known to work in at least two different types of development boards.
 
It is your task to prove that your LoRa Technology Gateway development board is functional and that the SOSC 32.768KHz crystal oscillator runs.

我下载并烧毁了劳拉技术网关固件，开发板是工作的，SoSC 32.768千赫晶体振荡器运行。我想做的是使RTCC时间，但现在RTCC总是不运行。我只使用您的代码在程序中，否则没有。



      以下为原文

    I have downloaded and burned the LoRa Technology Gateway firmware,the development board is work,and the SOSC 32.768KHz crystal oscillator runs.What I want to do is enable RTCC to time,but now the rtcc always not running.I only used your posted codes in the program,else nothing.

我怀疑，但不能证明在PIC24EP512GU810中存在一个问题，即使在OSCCCON中的LPSECN位被设置并且RCFGCAL中的TrTCEN位都被设置时，PTC24EP512GU810也不允许RTCC启用SOSC振荡放大器。为了解决这个问题，启用Time1也使用SoSC作为时钟源。我已经搜索了用于LLA技术网关固件的拆卸代码，并且只找到了使用SSOC作为时钟源初始化Time1的代码。RTCC似乎根本没有被使用。此外，劳拉技术网关固件使用不同的配置字，这些代码是我以前的代码所使用的。这个代码被更改为更新配置词并初始化Time1：



      以下为原文

   
I suspect but cannot prove that there is a problem in the PIC24EP512GU810 that prevents the RTCC from enabling the SOSC oscillation amplifier even when the LPOSCEN bit in OSCCCON is set and the RTCEN bit in RCFGCAL are both set. To work around this enable TIMER1 to use the SOSC as the clock source too.
 
I have searched the disassembly code for the LoRa Technology Gateway firmware and found only code to initialize TIMER1 using the SOSC as a clock source. The RTCC does not appear to be used at all. Also the LoRa Technology Gateway firmware uses different configuration words that those used by my previous code.
 
This code is changed to update the configuration words and initialize TIMER1:/*
 * File:   main.c
 * Target: PIC24EP512GU810
 *
 *
 */

#pragma config GWRP = OFF, GSS = OFF, GSSK = OFF
#pragma config FNOSC = PRIPLL, IESO = ON
#pragma config POSCMD = HS, OSCIOFNC = ON, IOL1WAY = OFF, FCKSM = CSDCMD
#pragma config WDTPOST = PS32768, WDTPRE = PR128, PLLKEN = ON, WINDIS = OFF, FWDTEN = OFF
#pragma config FPWRT = PWR128, BOREN = OFF, ALTI2C1 = OFF, ALTI2C2 = ON
#pragma config ICS = PGD1, RSTPRI = PF, JTAGEN = OFF
#pragma config AWRP = OFF, APL = OFF, APLK = OFF

#include "xc.h"

/*
 * Define the target system clock frequency.
 *
 * The initialization MUST set the system clock to support these definitions.
 *
 */
/* Setup the clock to run at about 60 MIPS (60,000,000Hz) */
#define FPRI  (8000000L)    /* Primary oscillator frequency */
#define PLL_N1 (2L)         /* PLLPRE  CLKDIV<4:0> range 2 to 33 */
#define PLL_M  (60)         /* PLLDIV  PLLFBD<8:0> range 2 to 513 */
#define PLL_N2 (2L)         /* PLLPOST CLKDIV<7:6> range 2, 4 or 8 */
#define FSYS (FPRI*PLL_M/(PLL_N1*PLL_N2))
#define FCYC (FSYS/2L)
/*
 *  Global types
 */
typedef union {
    struct {
        unsigned int YY;
        unsigned int MMDD;
        unsigned int WWHH;
        unsigned int MMSS;
    };
    struct {
        unsigned char BCD_Year;
        unsigned char BCD_reserved;
        unsigned char BCD_Day;
        unsigned char BCD_Month;
        unsigned char BCD_Hours;
        unsigned char BCD_DayOfWeek;
        unsigned char BCD_Seconds;
        unsigned char BCD_Minutes;
    };
} RTCC_TimeOfDay_t;
/*
 * Global constant data
 */
const unsigned long gInstructionCyclesPerSecond = FCYC;

/* define map input pin numbers */
enum
{   
    RPI_NONE   = 0,
    RPI_C1OUT  = 1,
    RPI_C2OUT  = 2,
    RPI_C3OUT  = 3,
    RPI_FINDX1 = 8,
    RPI_FHOME1 = 9,
    RPI_FINDX2 = 10,
    RPI_FHOME2 = 11,
    RPI_RA0    = 16,
    RPI_RA1    = 17,
    RPI_RA2    = 18,
    RPI_RA3    = 19,
    RPI_RA4    = 20,
    RPI_RA5    = 21,
    RPI_RA6    = 22,
    RPI_RA7    = 23,
    RPI_RA14   = 30,
    RPI_RA15   = 31,
    RPI_RB0    = 32,
    RPI_RB1    = 33,
    RPI_RB2    = 34,
    RPI_RB3    = 35,
    RPI_RB4    = 36,
    RPI_RB5    = 37,
    RPI_RB6    = 38,
    RPI_RB7    = 39,
    RPI_RB8    = 40,
    RPI_RB9    = 41,
    RPI_RB10   = 42,
    RPI_RB11   = 43,
    RPI_RB12   = 44,
    RPI_RB13   = 45,
    RPI_RB14   = 46,
    RPI_RB15   = 47,
    RPI_RC1    = 49,
    RPI_RC2    = 50,
    RPI_RC3    = 51,
    RPI_RC4    = 52,
    RPI_RC12   = 60,
    RPI_RC13   = 61,
    RPI_RC14   = 62,
    RPI_RD0    = 64,
    RPI_RD1    = 65,
    RPI_RD2    = 66,
    RPI_RD3    = 67,
    RPI_RD4    = 68,
    RPI_RD5    = 69,
    RPI_RD6    = 70,
    RPI_RD7    = 71,
    RPI_RD8    = 72,
    RPI_RD9    = 73,
    RPI_RD10   = 74,
    RPI_RD11   = 75,
    RPI_RD12   = 76,
    RPI_RD13   = 77,
    RPI_RD14   = 78,
    RPI_RD15   = 79,
    RPI_RE0    = 80,
    RPI_RE2    = 82,
    RPI_RE4    = 84,
    RPI_RE5    = 85,
    RPI_RE7    = 87,
    RPI_RE1    = 81,
    RPI_RE3    = 83,
    RPI_RE6    = 86,
    RPI_RE8    = 88,
    RPI_RE9    = 89,
    RPI_RF0    = 96,
    RPI_RF1    = 97,
    RPI_RF2    = 98,
    RPI_RF3    = 99,
    RPI_RF4    = 100,
    RPI_RF5    = 101,
    RPI_RF8    = 104,
    RPI_RF12   = 108,
    RPI_RF13   = 109,
    RPI_RG0    = 112,
    RPI_RG1    = 113,
    RPI_RG6    = 118,
    RPI_RG7    = 119,
    RPI_RG8    = 120,
    RPI_RG9    = 121,
    RPI_RG13   = 125,
    RPI_RG12   = 124,
    RPI_RG14   = 126,
    RPI_RG15   = 127,
};  
    
/* define map output function numbers */
enum
{   
    RPO_NONE      = 0b000000, /* Default Pin                         */
    RPO_U1TX      = 0b000001, /* UART1 Transmit                      */
    RPO_U1RTS     = 0b000010, /* UART1 Ready-to-Send                 */
    RPO_U2TX      = 0b000011, /* UART2 Transmit                      */
    RPO_U2RTS     = 0b000100, /* UART2 Ready-to-Send                 */
    RPO_SDO1      = 0b000101, /* SPI1 Data Output                    */
    RPO_SCK1      = 0b000110, /* SPI1 Clock Output                   */
    RPO_SS1       = 0b000111, /* SPI1 Slave Select                   */
    RPO_SS2       = 0b001010, /* SPI2 Slave Select                   */
    RPO_CSDO      = 0b001011, /* DCI Data Output                     */
    RPO_CSCK      = 0b001100, /* DCI Clock Output                    */
    RPO_COFS      = 0b001101, /* DCI FSYNC Output                    */
    RPO_C1TX      = 0b001110, /* CAN1 Transmit                       */
    RPO_C2TX      = 0b001111, /* CAN2 Transmit                       */
    RPO_OC1       = 0b010000, /* Output Compare 1 Output             */
    RPO_OC2       = 0b010001, /* Output Compare 2 Output             */
    RPO_OC3       = 0b010010, /* Output Compare 3 Output             */
    RPO_OC4       = 0b010011, /* Output Compare 4 Output             */
    RPO_OC5       = 0b010100, /* Output Compare 5 Output             */
    RPO_OC6       = 0b010101, /* Output Compare 6 Output             */
    RPO_OC7       = 0b010110, /* Output Compare 7 Output             */
    RPO_OC8       = 0b010111, /* Output Compare 8 Output             */
    RPO_C1OUT     = 0b011000, /* Comparator Output 1                 */
    RPO_C2OUT     = 0b011001, /* Comparator Output 2                 */
    RPO_C3OUT     = 0b011010, /* Comparator Output 3                 */
    RPO_U3TX      = 0b011011, /* UART3 Transmit                      */
    RPO_U3RTS     = 0b011100, /* UART3 Ready-to-Send                 */
    RPO_U4TX      = 0b011101, /* UART4 Transmit                      */
    RPO_U4RTS     = 0b011110, /* UART4 Ready-to-Send                 */
    RPO_SDO3      = 0b011111, /* SPI3 Data Output                    */
    RPO_SCK3      = 0b100000, /* SPI3 Clock Output                   */
    RPO_SS3       = 0b100001, /* SPI3 Slave Select                   */
    RPO_SDO4      = 0b100010, /* SPI4 Data Output                    */
    RPO_SCK4      = 0b100011, /* SPI4 Clock Output                   */
    RPO_SS4       = 0b100100, /* SPI4 Slave Select                   */
    RPO_OC9       = 0b100101, /* Output Compare 9 Output             */
    RPO_OC10      = 0b100110, /* Output Compare 10 Output            */
    RPO_OC11      = 0b100111, /* Output Compare 11 Output            */
    RPO_OC12      = 0b101000, /* Output Compare 12 Output            */
    RPO_OC13      = 0b101001, /* Output Compare 13 Output            */
    RPO_OC14      = 0b101010, /* Output Compare 14 Output            */
    RPO_OC15      = 0b101011, /* Output Compare 15 Output            */
    RPO_OC16      = 0b101100, /* Output Compare 16 Output            */
    RPO_SYNCO1    = 0b101101, /* PWM Primary Time Base Sync Output   */
    RPO_SYNCO2    = 0b101110, /* PWM Secondary Time Base Sync Output */
    RPO_QEI1CCMP  = 0b101111, /* QEI 1 Counter Comparator Output     */
    RPO_QEI2CCMP  = 0b110000, /* QEI 2 Counter Comparator Output     */
    RPO_REFCLK    = 0b110001, /* Reference Clock Output              */
};  
    
/* Initialize this PIC */
void Init_PIC(void)
{   
    unsigned int ClockSwitchTimeout;

    /*
    ** Disable all interrupt sources
    */
    __builtin_disi(0x3FFF); /* disable interrupts for 16383 cycles */
    IEC0 = 0;
    IEC1 = 0;
    IEC2 = 0;
    IEC3 = 0;
    IEC4 = 0;
    IEC5 = 0;
    IEC7 = 0;
    IEC8 = 0;
    __builtin_disi(0x0000); /* enable interrupts */
    
    /*
     * At Power On Reset the configuration words set the system clock
     * to use the FRC oscillator. At this point we need to enable the
     * PLL to get the system clock running at 32MHz.
     *
     * Clock switching on the 24FJ family with the PLL can be a bit tricky.
     *
     * First we need to check if the configuration words enabled clock
     * switching at all, then turn off the PLL, then setup the PLL and
     * finally enable it. Sounds simple, I know. Make sure you verify this
     * clock setup on the real hardware.
     */
    if(!OSCCONbits.CLKLOCK) /* if primary oscillator switching is unlocked */
    {
        /* Initiate Clock Switch to FRC oscillator (NOSC=0b000) */
        __builtin_write_OSCCONH(0x00);

        /* start clock switch */
        __builtin_write_OSCCONL(OSCCON | _OSCCON_OSWEN_MASK);
        
        /* wait, with timeout, for clock switch to complete */
        for(ClockSwitchTimeout=10000; --ClockSwitchTimeout && OSCCONbits.OSWEN;);

        /* Configure PLL prescaler, PLL postscaler, PLL divisor */
        PLLFBD=PLL_M-2;
#if   PLL_N2==2
        CLKDIVbits.PLLPOST=0; /* N2=2 */
#elif PLL_N2==4
        CLKDIVbits.PLLPOST=1; /* N2=4 */
#elif PLL_N2==8
        CLKDIVbits.PLLPOST=3; /* N2=8 */
#else
#error invalid PLL_N2 paramenter
#endif
        CLKDIVbits.PLLPRE=PLL_N1-2; /* N1=2 */

        /* Initiate Clock Switch to PRI oscillator with PLL (NOSC=0b011) */
        __builtin_write_OSCCONH(0x03);

        /* start clock switch */
        __builtin_write_OSCCONL(OSCCON | _OSCCON_OSWEN_MASK);

        /* wait, with timeout, for clock switch to complete */
        for(ClockSwitchTimeout=10000; --ClockSwitchTimeout && OSCCONbits.OSWEN;);

        /* wait, with timeout, for the PLL to lock */
        for(ClockSwitchTimeout=10000; --ClockSwitchTimeout && !OSCCONbits.LOCK;);
    }

    /* make all inputs digital I/O */
    ANSELA   =  0x0000; /* Set for digital I/O */
    ANSELB   =  0x0000; /* Set for digital I/O */
    ANSELC   =  0x0000; /* Set for digital I/O */
    ANSELD   =  0x0000; /* Set for digital I/O */
    ANSELE   =  0x0000; /* Set for digital I/O */
    ANSELG   =  0x0000; /* Set for digital I/O */
    
    CM1CON  = 0x0000;
    CM2CON  = 0x0000;
    CM3CON  = 0x0000;
    
    _NSTDIS = 1;    /* disable interrupt nesting */
        
    TRISA   = 0xFFFF;
    TRISB   = 0xFFFF;
    TRISC   = 0xFFFF;
    TRISD   = 0xFFFF;
    TRISE   = 0xFFFF;
    TRISF   = 0xFFFF;
    TRISG   = 0xFFFF;
    
    /* Unlock Registers */
    __builtin_write_OSCCONL(OSCCON & ~_OSCCON_IOLOCK_MASK);
    
    /* map all inputs */
    _INT1R    = RPI_NONE;
    _INT2R    = RPI_NONE;
    _INT3R    = RPI_NONE;
    _INT4R    = RPI_NONE;
    _T2CKR    = RPI_NONE;
    _T3CKR    = RPI_NONE;
    _T4CKR    = RPI_NONE;
    _T5CKR    = RPI_NONE;
    _T6CKR    = RPI_NONE;
    _T7CKR    = RPI_NONE;
    _T8CKR    = RPI_NONE;
    _T9CKR    = RPI_NONE;
    _IC1R     = RPI_NONE;
    _IC2R     = RPI_NONE;
    _IC3R     = RPI_NONE;
    _IC4R     = RPI_NONE;
    _IC5R     = RPI_NONE;
    _IC6R     = RPI_NONE;
    _IC7R     = RPI_NONE;
    _IC8R     = RPI_NONE;
    _OCFAR    = RPI_NONE;
    _OCFBR    = RPI_NONE;
    _FLT1R    = RPI_NONE;
    _FLT2R    = RPI_NONE;
    _FLT3R    = RPI_NONE;
    _FLT4R    = RPI_NONE;
    _QEA1R    = RPI_NONE;
    _QEB1R    = RPI_NONE;
    _INDX1R   = RPI_NONE;
    _HOME1R   = RPI_NONE;
    _QEA2R    = RPI_NONE;
    _QEB2R    = RPI_NONE;
    _INDX2R   = RPI_NONE;
    _HOME2R   = RPI_NONE;
    _U1RXR    = RPI_NONE;
    _U1CTSR   = RPI_NONE;
    _U2RXR    = RPI_NONE;
    _U2CTSR   = RPI_NONE;
    _SDI1R    = RPI_NONE;
    _SCK1R    = RPI_NONE;
    _SS1R     = RPI_NONE;
    _SS2R     = RPI_NONE;
    _CSDIR    = RPI_NONE;
    _CSCKR    = RPI_NONE;
    _COFSR    = RPI_NONE;
    _C1RXR    = RPI_NONE;
    _C2RXR    = RPI_NONE;
    _U3RXR    = RPI_NONE;
    _U3CTSR   = RPI_NONE;
    _U4RXR    = RPI_NONE;
    _U4CTSR   = RPI_NONE;
    _SDI3R    = RPI_NONE;
    _SCK3R    = RPI_NONE;
    _SS3R     = RPI_NONE;
    _SDI4R    = RPI_NONE;
    _SCK4R    = RPI_NONE;
    _SS4R     = RPI_NONE;
    _IC9R     = RPI_NONE;
    _IC10R    = RPI_NONE;
    _IC11R    = RPI_NONE;
    _IC12R    = RPI_NONE;
    _IC13R    = RPI_NONE;
    _IC14R    = RPI_NONE;
    _IC15R    = RPI_NONE;
    _IC16R    = RPI_NONE;
    _OCFCR    = RPI_NONE;
    _FLT5R    = RPI_NONE;
    _FLT6R    = RPI_NONE;
    _FLT7R    = RPI_NONE;
    _DTCMP1R  = RPI_NONE;
    _DTCMP2R  = RPI_NONE;
    _DTCMP3R  = RPI_NONE;
    _DTCMP4R  = RPI_NONE;
    _DTCMP5R  = RPI_NONE;
    _DTCMP6R  = RPI_NONE;
    _DTCMP7R  = RPI_NONE;
    _SYNCI1R  = RPI_NONE;
    _SYNCI2R  = RPI_NONE;

    /* map all outputs */
    _RP64R    = RPO_NONE;  /* RD0  */
    _RP65R    = RPO_NONE;  /* RD1  */
    _RP66R    = RPO_NONE;  /* RD2  */
    _RP67R    = RPO_NONE;  /* RD3  */
    _RP68R    = RPO_NONE;  /* RD4  */
    _RP69R    = RPO_NONE;  /* RD5  */
    _RP70R    = RPO_NONE;  /* RD6  */
    _RP71R    = RPO_NONE;  /* RD7  */
    _RP79R    = RPO_NONE;  /* RD15 */
    _RP80R    = RPO_NONE;  /* RE0  */
    _RP82R    = RPO_NONE;  /* RE2  */
    _RP84R    = RPO_NONE;  /* RE4  */
    _RP85R    = RPO_NONE;  /* RE5  */
    _RP87R    = RPO_NONE;  /* RE7  */
    _RP96R    = RPO_NONE;  /* RF0  */
    _RP97R    = RPO_NONE;  /* RF1  */
    _RP98R    = RPO_NONE;  /* RF2  */
    _RP99R    = RPO_NONE;  /* RF3  */
    _RP100R   = RPO_NONE;  /* RF4  */
    _RP101R   = RPO_NONE;  /* RF5  */
    _RP104R   = RPO_NONE;  /* RF8  */
    _RP108R   = RPO_NONE;  /* RF12 */
    _RP109R   = RPO_NONE;  /* RF13 */
    _RP112R   = RPO_NONE;  /* RG0  */
    _RP113R   = RPO_NONE;  /* RG1  */
    _RP118R   = RPO_NONE;  /* RG6  */
    _RP120R   = RPO_NONE;  /* RG8  */
    _RP125R   = RPO_NONE;  /* RG13 */
    _RP126R   = RPO_NONE;  /* RG14 */
    _RP127R   = RPO_NONE;  /* RG15 */
    
    /* Lock Registers */
    __builtin_write_OSCCONL(OSCCON | _OSCCON_IOLOCK_MASK);
}

/* warning non-portable function */
/*
 * This function waits for the at least the
 * specified number milliseconds then returns.
 */
void delay( unsigned int wait_ms )
{
    register unsigned int temp = wait_ms;
    if(temp)
    {
        asm("L_wait:           n"
            "    nop           n"
            "    nop           n"
            "    nop           n"
            "    repeat  %0    n"
            "    clrwdt        n"
            "    repeat  %0    n"
            "    clrwdt        n"
            "    repeat  %0    n"
            "    clrwdt        n"
            "    repeat  %0    n"
            "    clrwdt        n"
            "    dec %1,%1     n"
            "    BRA NZ,L_wait n"
            : /* no outputs */
            : "r" ((unsigned int)(FCYC/4/1000-4)),
              "r" (temp)
            );
    }
}
/*
 *  Initialize Real Time Clock Calander module
 */
void Init_RTCC(const RTCC_TimeOfDay_t *Current, const RTCC_TimeOfDay_t *Alarm)
{
    /*
     * There is a potential conflict with Auxiliary Clock Generation.
     *
     * The Auxiliary Clock Generation must use another clock
     * source when RTCC uses the the secondary oscillator
     * as the low power oscillator oscillator.
     */
    _RTCIE = 0;         /* Disable RTCC alarm interrupt */
    _RTCIP = 4;         /* Set RTCC alarm interrupt priority */
    /* Turn on Low Power Oscillator connected to RC13,RC14 (PGD2,PGC2) */
    __builtin_write_OSCCONL(OSCCON | _OSCCON_LPOSCEN_MASK);

    /* enable write to the RTCC */
    asm volatile(
        " disi #5n"             /* disable interrupts for 5 cycles */
        " mov  #0x55, w0n"      /* write first step of unlock sequence */
        " mov  w0,_NVMKEYn"
        " mov  #0xAA, w1n"      /* write second step of unlock sequence */
        " mov  w1,_NVMKEYn"
        " bset %[REG],#%[BIT]n" /* set the RTCWREN bit to unlock writes ro the RTCC */
        : /* no outputs */
        :  [REG]"U"(RCFGCAL),[BIT]"i"(_RCFGCAL_RTCWREN_POSITION)
        : "w0", "w1"    /* clobbers these working registers */
        );
    _RTCEN = 1;         /* enable the RTCC module */
    if(Current)
    {
        _RTCPTR = 0b11;     /* set the RTCC Value register window to Year */
        RTCVAL  = Current->YY & 0x00FF;
        RTCVAL  = Current->MMDD;
        RTCVAL  = Current->WWHH;
        RTCVAL  = Current->MMSS;
    }

    if(Alarm)
    {
        /* disable alarm and set alarm register pointer to Month and Day */
        ALCFGRPT = (0b10<<_ALCFGRPT_ALRMPTR_POSITION);
        ALRMVAL  = Alarm->MMDD;
        ALRMVAL  = Alarm->WWHH;
        ALRMVAL  = Alarm->MMSS;
    }

    /* enable and alarm every one second */
    ALCFGRPT = ALCFGRPT | (0b0001<<_ALCFGRPT_AMASK_POSITION)
                        | (1<<_ALCFGRPT_CHIME_POSITION)
                        | (1<<_ALCFGRPT_ALRMEN_POSITION);

    _RTCWREN = 0;       /* lock the RTCC, no more writes */

    _RTCIF = 0;         /* Clear RTCC alarm interrupt assertion */
    _RTCIE = 1;         /* Enable RTCC alarm interrupt */
}
/*
 * Initialize TIMER1
 */
void Init_TIMER1( void )
{
    /*
     * There is a potential conflict with Auxiliary Clock Generation.
     *
     * The Auxiliary Clock Generation must use another clock
     * source when TIMER1 uses the the secondary oscillator
     * as the low power oscillator oscillator.
     */
    /* Turn in Low Power Oscillator connected to RC13,RC14 (PGD2,PGC2) */
    __builtin_write_OSCCONL(OSCCON | _OSCCON_LPOSCEN_MASK);

    T1CONbits.TON = 0;      /* Disable Timer */
    T1CONbits.TCS = 1;      /* External clock from TxCK pin */
    T1CONbits.TGATE = 0;    /* Disable Gated Timer mode */
    T1CONbits.TCKPS = 0b00; /* Select 1:1 Prescaler */
    T1CONbits.TSYNC = 0;    /* Do not synchronize external clock input */
    TMR1 = 0;               /* Clear timer register */
    PR1 = 32767;            /* Load the timer reset count value */
    IPC0bits.T1IP = 0x04;   /* Set Timer1 Interrupt Priority Level */
    IFS0bits.T1IF = 0;      /* Clear Timer1 Interrupt Flag */
    IEC0bits.T1IE = 1;      /* Enable Timer1 interrupt */
    T1CONbits.TON = 1;      /* Start Timer */
}
/*
 * Power on rest values for RTCC
 */
const RTCC_TimeOfDay_t Datum_TOD   = {{0x0017, 0x0518, 0x0000, 0x0000}};
const RTCC_TimeOfDay_t Datum_Alarm = {{0x0000, 0x0000, 0x0000, 0x0000}};
/*
 * Application start
 */
int main(void)
{
    Init_PIC();

    /* do a POR lamp test */
    TRISGbits.TRISG15 = 0; /* Make RG15 an output */
    LATGbits.LATG15 = 0;   /* Turn on dv164140-2 demo board LED D4 */
    delay( 250 );
    LATGbits.LATG15 ^= 1;  /* Toggle dv164140-2 demo board LED D4 */
    delay( 250 );
    LATGbits.LATG15 ^= 1;  /* Toggle dv164140-2 demo board LED D4 */
    delay( 250 );
    LATGbits.LATG15 ^= 1;  /* Toggle dv164140-2 demo board LED D4 */
    delay( 250 );
    LATGbits.LATG15 ^= 1;  /* Toggle dv164140-2 demo board LED D4 */

    Init_TIMER1();
    Init_RTCC(&Datum_TOD, &Datum_Alarm);


    /* Application loop */
    for(;;)
    {
    }
    return 0;
}
/*
 * Handle TIMER1 interrupt
 */
void __attribute__((__interrupt__, no_auto_psv)) _T1Interrupt(void)
{
    IFS0bits.T1IF = 0;  /* Clear Timer1 Interrupt Flag */
}
/*
 * Handle RTCC interrupt
 */
void __attribute__((__interrupt__, no_auto_psv)) _RTCCInterrupt(void)
{
    _RTCIF = 0;  /* Clear RTCC Interrupt Flag */
    LATGbits.LATG15 ^= 1; /* Toggle dv164140-2 demo board LED D4 */
}

检查计时器1和RTCC不能使用相同的PIN／SOSC。



      以下为原文

    Check Timer 1 and RTCC cannot use the same pin / sosc.

我所能说的是RTCC和Time1都在我的ExpReal16上工作。注意到了，但是在这种情况下似乎不相关。



      以下为原文

   
All I can say is that the RTCC & TIMER1 are both working on my Explorer16.

Your caution is noted, but does not seem to be relevant in this case.

T1门控吗？同一个PIC用RTCC和SOSC来运行，（FRCPLL）



      以下为原文

    is T1 Gated ?  My same PIC ran with RTCC and sosc ,( FRCPLL ) 

它只是配置为计时器，不使用门输入。



      以下为原文

   
It is just configured as a timer and does not use a gate input.
 

谢谢，丹，你用Time1代替RTCC记录时间是什么意思？我使用了你最近发布的代码，在初始化Time1之后，程序没有到达Time1 ISR。和@ LES，你使用PIC24EP512GU810吗？



      以下为原文

    Thank you,@dan1138@Les .Dan,What your mean is use Timer1 instead of RTCC to record time?And I used your latest posted codes,after initializing Timer1,the program not getting to the Timer1 ISR.And @Les,do you use the PIC24EP512GU810?

不，我不是那个意思。当你无法描述你所做的事情时。一步一步地。记录你看到的东西。记录你期望看到但却没有看到的东西。你不可能给你提供任何有用的帮助。你所说的只是你已经尝试过我的代码而不起作用。我的代码在我的硬件中工作。从我在DV164140-2的示意图中可以看到，它应该启动所有的振荡器，运行应用程序循环和处理中断。您已经说过，劳拉技术网关固件初始化DV164140-2和32.768 kHz振荡器运行。4140-2板调试更多的人可以做什么？在尝试建立一个解决方案之前，你必须努力去实际地观察和记录问题所在。做真正的工作！



      以下为原文

   
No, I do not mean that.

When you fail to describe what you have done. Step by step. Document what you see. Document what you expected to see but did not. You make it impossible to offer you any useful help.
 
All you have ever said is that you have tried my code and is does not work.
 
My code works in my hardware. From what I can see in the schematic for the DV164140-2 it should start all of the oscillators, run the application loop and handle interrupts.
 
You have said the the LoRa Technology Gateway firmware initializes the DV164140-2 and the 32.768KHz oscillator runs.
 
Short of you sending me one of your DV164140-2 boards to debug what more can anyone do?
 
It is up to you to do the hard work of actually seeing and documenting what the problem is before trying to create a fix.
 
Get on with it. Do the real work!