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我对FPGA编程有疑问..如果我想使用另一个fpga来做它(例如编程fpga2我将使用fpga1),除了jtag之外,我可能需要从fpga1获取额外的引脚( TDI,TDO,TMS,TCK),CSO_B,CCLK等...为了更清楚,通常我们需要向下拉起PROG_B引脚以启动编程过程r8我怀疑是否必须使用IO来实现 或者还有其他方法可以做到这一点。 谢谢你们 以上来自于谷歌翻译 以下为原文 Dear every one, I have a doubt in fpga programming.. If I want to use another fpga for doing it(say for example to program fpga2 I will use fpga1), what will be the extra pins I may have to take from the fpga1 apart from jtag (TDI,TDO,TMS,TCK) , CSO_B,CCLK etc... To be more clear ,, Usually we need to pull the PROG_B pin down and up for starting the programming process r8 my doubt is whether I have to use IO for that or is there any other way to do it. Thank you all |
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bhanu005写道:雅,我用斯巴达3AN。
例如,让我们忘记程序员。 目标如何理解它被编程的模式,我看到设计中使用了一些开关来选择M0,M1和M2(在目标板中)。 有没有其他标准方法可以做到这一点。 对不起,我对此有很多疑问..我得到这些疑问的原因是在看到xilinx平台电缆USB II之后。 他们没有使用配置引脚以外的任何引脚。 在冲击工具中选择模式是可以的。 如果M [2:0]引脚定义的模式与之匹配,该怎么办? 你应该花时间阅读Spartan-3系列配置用户指南UG332。 您的大多数问题都在该文档中得到了解答。 对于Spartan 3AN,最常见的配置方法是内部主SPI模式(该文档的第10章)。 开关必须设置为M [2:0] =“011”。 现在,这就是FPGA如何从内部SPI闪存配置自己。 它与您实际编程闪存的方式无关。 如果模式引脚M [2:0]不是“011”,则FPGA将尝试使用与模式引脚匹配的模式进行配置,如果没有其他配置存储器,则配置显然会失败。 至于“看到xilinx平台电缆USB II”,那家伙是JTAG适配器。 您需要设计电路板,将FPGA的专用JTAG引脚引入标准接头。 将加密狗连接到电路板并启动iMPACT后,您可以对SPI闪存进行编程和/或直接通过JTAG配置FPGA。 (如果存在JTAG主站,则该配置接口始终可用并覆盖其他接口。) 他们还提到配置用户指南“HSWAP或PUDC_B引脚,模式选择引脚(M [2:0])和变量选择引脚(VS [2:0])必须具有有效且稳定的逻辑 配置开始时的值“。 谁在选择那些针脚。 我们是否必须在使用开关进行编程之前选择这些引脚,或者是否有任何自动方式。 任何想法请.... 电路设计人员决定这些引脚的正确状态。 因此,如果您使用内部闪存进行配置,则使用RTFM来确定这些引脚的正确状态。 然后适当地设计你的板。 ----------------------------是的,我这样做是为了谋生。 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 bhanu005 wrote:You should really spend quality time reading UG332, the Spartan-3 Generation Configuration User Guide. Most of your questions are answered in that document. For Spartan 3AN, the most common configuration method is Internal Master SPI Mode (chapter 10 of that document). The switches must be set to M[2:0] = "011". Now this is how the FPGA configures itself from that internal SPI flash. It has nothing to do with how you actually program the flash. If your Mode pins M[2:0] are not "011" then the FPGA will try to configure using whichever mode matches the mode pins, and if there is no other configuration memory then the configuration will obviously fail. As for "seeing the xilinx platform cable USB II," that guy is a JTAG adapter. You need to design the board to bring out the FPGA's dedicated JTAG pins to the standard header. Once you connect the dongle to the board and fire up iMPACT, you can program the SPI flash and/or configure the FPGA directly over JTAG. (If a JTAG master is present, that configuration interface is always available and overrides the others.) Also they have mentioned the line in config user guide "The HSWAP or PUDC_B pin, the mode select pins (M[2:0]), and the variant-select pins (VS[2:0]) must have valid and stable logic values at the start of configuration". who is selecting those pins. Whether we have to select these pins prior to programming using the switches or is there any automatic way. any idea about this please....The circuit designer decides the proper state of those pins. So if you use the internal flash for configuration, RTFM for the proper state of those pins. Then design your board appropriately. ----------------------------Yes, I do this for a living.View solution in original post |
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另外我们如何为目标fpga选择模式。
(M0,M1,M2)?? 以上来自于谷歌翻译 以下为原文 Also how do we select the mode for the target fpga. (M0,M1,M2)?? |
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我也应该使用相同的晶体为USB控制器和FPGA提供时钟。
如果不是,......为什么? 以上来自于谷歌翻译 以下为原文 And also shall I use the same crystal for providing clock to both USB controller and FPGA. If not ,... why?? |
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您没有说明您使用的是哪种设备。
每个Xilinx FPGA系列都有一个“配置用户指南”,描述了如何使用所有可用的编程模式,并包括示例原理图。 例如,对于Spartan 6,这是ug380。 如果您在查看用户指南后仍有疑问,请回来。 - Gabor 以上来自于谷歌翻译 以下为原文 You didn't say which device you are using. Each Xilinx FPGA family has a "Configuration User Guide" that describes how to use all of the available programming modes, and includes example schematics. For example for Spartan 6 this is ug380. Come back if you still have questions after reviewing the user guide. -- Gabor |
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雅,我用斯巴达3AN。
例如,让我们忘记程序员。 目标如何理解它被编程的模式,我看到设计中使用了一些开关来选择M0,M1和M2(在目标板中)。 有没有其他标准方法可以做到这一点。 对不起,我对此有很多疑问..我得到这些疑问的原因是在看到xilinx平台电缆USB II之后。 他们没有使用配置引脚以外的任何引脚。 在冲击工具中选择模式是可以的。 如果M [2:0]引脚定义的模式与它不匹配怎么办。他们也在配置用户指南中提到了“HSWAP或PUDC_B引脚,模式选择引脚(M [2:0]) 变量选择引脚(VS [2:0])必须在配置开始时具有有效且稳定的逻辑值“。 谁在选择那些针脚。 我们是否必须在使用开关进行编程之前选择这些引脚,或者是否有任何自动方式..抱歉如果我的问题不清楚......请告诉我如果我的问题让您感到困惑...我将尝试成为 更清晰.. 以上来自于谷歌翻译 以下为原文 Ya , I use spartan 3AN. For instance let us forget about the programmer. How does the target understand which mode it is getting programmed, I saw some switches used in a design to select M0, M1 and M2(in the target board). Are there any other standard methods to do it. I am sorry , I have a lot of doubts in this.. The reason I got these doubts is after seeing the xilinx platform cable USB II. They have not used any Pins other than the config pins. It is OK that the mode is selected in impact tool. What if the mode defined by the M[2:0] pins doesn't match with it. Also they have mentioned the line in config user guide "The HSWAP or PUDC_B pin, the mode select pins (M[2:0]), and the variant-select pins (VS[2:0]) must have valid and stable logic values at the start of configuration". who is selecting those pins. Whether we have to select these pins prior to programming using the switches or is there any automatic way.. Sorry If my question is not clear.... Just let me know If my question is confusing you... I will try to be more clear.. |
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另外我读到在主模式下,配置的控制逻辑由fpga本身完成。
当fpga没有非易失性存储器时,存储控制逻辑的位置 以上来自于谷歌翻译 以下为原文 Also I read that in Master Mode, the control logic for configuration is done by fpga itself. where is that control logic stored when fpga doesn't have a non volatile memory |
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>>另外我读到在主模式下,>>配置的控制逻辑由fpga本身完成。
当fpga没有非易失性存储器,逻辑硬连线时,存储的控制逻辑>>存储在哪里,并且FPGA就像常规处理器一样唤醒并编程自身,因为它有一些rom启动代码,因此知道如何启动自身。 - 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。 以上来自于谷歌翻译 以下为原文 >> Also I read that in Master Mode, the control logic for >> configuration is done by fpga itself. where is that control logic >> stored when fpga doesn't have a non volatile memory that logic is hardwired, and the FPGA wakes up and programs itself just like a regular processor knows how to boot itself because it has some rom boot code. - Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. |
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这是否意味着没有人可以触摸那个记忆......?
以上来自于谷歌翻译 以下为原文 Does that mean nobody can touch that memory...?? |
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雅,我用斯巴达3AN。
例如,让我们忘记程序员。 目标如何理解它被编程的模式,我看到设计中使用了一些开关来选择M0,M1和M2(在目标板中)。 有没有其他标准方法可以做到这一点。 对不起,我对此有很多疑问..我得到这些疑问的原因是在看到xilinx平台电缆USB II之后。 他们没有使用配置引脚以外的任何引脚。 在冲击工具中选择模式是可以的。 如果M [2:0]引脚定义的模式与它不匹配怎么办。他们也在配置用户指南中提到了“HSWAP或PUDC_B引脚,模式选择引脚(M [2:0]) 变量选择引脚(VS [2:0])必须在配置开始时具有有效且稳定的逻辑值“。 谁在选择那些针脚。 我们是否必须在使用开关进行编程之前选择这些引脚,或者是否有任何自动方式......请对此有所了解.... 以上来自于谷歌翻译 以下为原文 Ya , I use spartan 3AN. For instance let us forget about the programmer. How does the target understand which mode it is getting programmed, I saw some switches used in a design to select M0, M1 and M2(in the target board). Are there any other standard methods to do it. I am sorry , I have a lot of doubts in this.. The reason I got these doubts is after seeing the xilinx platform cable USB II. They have not used any Pins other than the config pins. It is OK that the mode is selected in impact tool. What if the mode defined by the M[2:0] pins doesn't match with it. Also they have mentioned the line in config user guide "The HSWAP or PUDC_B pin, the mode select pins (M[2:0]), and the variant-select pins (VS[2:0]) must have valid and stable logic values at the start of configuration". who is selecting those pins. Whether we have to select these pins prior to programming using the switches or is there any automatic way.. any idea about this please.... |
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bhanu005写道:雅,我用斯巴达3AN。
例如,让我们忘记程序员。 目标如何理解它被编程的模式,我看到设计中使用了一些开关来选择M0,M1和M2(在目标板中)。 有没有其他标准方法可以做到这一点。 对不起,我对此有很多疑问..我得到这些疑问的原因是在看到xilinx平台电缆USB II之后。 他们没有使用配置引脚以外的任何引脚。 在冲击工具中选择模式是可以的。 如果M [2:0]引脚定义的模式与之匹配,该怎么办? 你应该花时间阅读Spartan-3系列配置用户指南UG332。 您的大多数问题都在该文档中得到了解答。 对于Spartan 3AN,最常见的配置方法是内部主SPI模式(该文档的第10章)。 开关必须设置为M [2:0] =“011”。 现在,这就是FPGA如何从内部SPI闪存配置自己。 它与您实际编程闪存的方式无关。 如果模式引脚M [2:0]不是“011”,则FPGA将尝试使用与模式引脚匹配的模式进行配置,如果没有其他配置存储器,则配置显然会失败。 至于“看到xilinx平台电缆USB II”,那家伙是JTAG适配器。 您需要设计电路板,将FPGA的专用JTAG引脚引入标准接头。 将加密狗连接到电路板并启动iMPACT后,您可以对SPI闪存进行编程和/或直接通过JTAG配置FPGA。 (如果存在JTAG主站,则该配置接口始终可用并覆盖其他接口。) 他们还提到配置用户指南“HSWAP或PUDC_B引脚,模式选择引脚(M [2:0])和变量选择引脚(VS [2:0])必须具有有效且稳定的逻辑 配置开始时的值“。 谁在选择那些针脚。 我们是否必须在使用开关进行编程之前选择这些引脚,或者是否有任何自动方式。 任何想法请.... 电路设计人员决定这些引脚的正确状态。 因此,如果您使用内部闪存进行配置,则使用RTFM来确定这些引脚的正确状态。 然后适当地设计你的板。 ----------------------------是的,我这样做是为了谋生。 以上来自于谷歌翻译 以下为原文 bhanu005 wrote:You should really spend quality time reading UG332, the Spartan-3 Generation Configuration User Guide. Most of your questions are answered in that document. For Spartan 3AN, the most common configuration method is Internal Master SPI Mode (chapter 10 of that document). The switches must be set to M[2:0] = "011". Now this is how the FPGA configures itself from that internal SPI flash. It has nothing to do with how you actually program the flash. If your Mode pins M[2:0] are not "011" then the FPGA will try to configure using whichever mode matches the mode pins, and if there is no other configuration memory then the configuration will obviously fail. As for "seeing the xilinx platform cable USB II," that guy is a JTAG adapter. You need to design the board to bring out the FPGA's dedicated JTAG pins to the standard header. Once you connect the dongle to the board and fire up iMPACT, you can program the SPI flash and/or configure the FPGA directly over JTAG. (If a JTAG master is present, that configuration interface is always available and overrides the others.) Also they have mentioned the line in config user guide "The HSWAP or PUDC_B pin, the mode select pins (M[2:0]), and the variant-select pins (VS[2:0]) must have valid and stable logic values at the start of configuration". who is selecting those pins. Whether we have to select these pins prior to programming using the switches or is there any automatic way. any idea about this please....The circuit designer decides the proper state of those pins. So if you use the internal flash for configuration, RTFM for the proper state of those pins. Then design your board appropriately. ----------------------------Yes, I do this for a living. |
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