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嗨，我试图使用两个计时器（time1和Time3）闪烁LeD0和LeD1，并且想要同时闪烁LED（我知道Time3比TMEL1低1个时钟周期），但是它变成了非常紧张的时钟周期。请检查我的源代码来纠正这个问题，THX！
以上来自于百度翻译 以下为原文 Hi, I was trying to use two timer(timer1 and timer3) to blink LED0 and LED1, and want to blink LED almost simultaneously( I knew timer3 is lower than tmer1 by 1 clock period), but it turns out enormously clock period. Please check my source code to correct this problem, thx! #include // PIC18F4520 Configuration Bit Settings // 'C' source line config statements // CONFIG1H #pragma config OSC = INTIO67 // Oscillator Selection bits (Internal oscillator block, port function on RA6 and RA7) #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled) #pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled) // CONFIG2L #pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled) #pragma config BOREN = ON // Brown-out Reset Enable bits (Brown-out Reset enabled and controlled by software (SBOREN is enabled)) #pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting) // CONFIG2H #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit)) #pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768) // CONFIG3H #pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1) #pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset) #pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation) #pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled) // CONFIG4L #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset) #pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled) #pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode)) // CONFIG5L #pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected) #pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected) #pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected) #pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected) // CONFIG5H #pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected) #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected) // CONFIG6L #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected) #pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected) #pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected) #pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected) // CONFIG6H #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected) #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected) #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected) // CONFIG7L #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks) #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks) #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks) #pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks) // CONFIG7H #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks) // #pragma config statements should precede project file includes. // Use project enums instead of #define for ON and OFF. #include void high_priority interrupt HighISR(void); void initial_timer1(void); void initial_timer3(void); void main(void){ OSCCONbits.IRCF = 0b110; // Internal Oscillator Frequency Select, Fosc = 4MHz RCONbits.IPEN = 1; // 1 = Enable priority levels on interrupts INTCONbits.PEIE = 1; // 1 = Enables all low-priority peripheral interrupts INTCONbits.GIE = 1; // 1 = Enables all high-priority interrupts TRISD = 0; TRISAbits.TRISA4 = 1; LATD = 0x00; initial_timer1(); initial_timer3(); while(1); }// end main void initial_timer1(void) { T1CONbits.TMR1ON = 1; // 1 = Enables Timer1 T1CONbits.TMR1CS = 1; // 1 = External clock from pin RC0/T1OSO/T13CKI (on the rising edge) T1CONbits.T1SYNC = 1; // 0 = Synchronize external clock input T1CONbits.T1OSCEN = 1; // 1 = Timer1 oscillator is enabled T1CONbits.T1CKPS = 0; // 00 = 1:1 Prescale value T1CONbits.T1RUN = 0; // 0 = Device clock is derived from another source T1CONbits.RD16 = 1; // 1 = Enables register read/write of TImer1 in one 16-bit operation PIE1bits.TMR1IE = 1; // 1 = Enables the TMR1 overflow interrupt IPR1bits.TMR1IP = 1; // 1 = High priority } void initial_timer3(void) { T3CONbits.TMR3ON = 1; // 1 = Enables Timer3 T3CONbits.TMR3CS = 1; // 1 = External clock input from Timer1 oscillator or T13CKI (on the rising edge after the first falling edge) T3CONbits.T3SYNC = 1; // 0 = Synchronize external clock input T3CONbits.T3CKPS = 0; // 00 = 1:1 Prescale value T3CONbits.RD16 = 1; // 1 = Enables register read/write of TImer3 in one 16-bit operation PIE2bits.TMR3IE = 1; // 1 = Enabled IPR2bits.TMR3IP = 1; // 1 = High priority } void high_priority interrupt HighISR(void) { if(PIE1bits.TMR1IE == 1 && PIR1bits.TMR1IF == 1){ PIR1bits.TMR1IF = 0; TMR1H = 0x40; // 65536-(32768/2) = 16384 TMR1L = 0x00; LATDbits.LATD0 = ~LATDbits.LATD0; } if(PIE2bits.TMR3IE == 1 && PIR2bits.TMR3IF == 1){ PIR2bits.TMR3IF = 0; TMR3H = 0x40; TMR1L = 0x00; LATDbits.LATD1 = ~LATDbits.LATD1; } } 
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5个回答
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空高优先级中断HyISISR（空隙）{if（Py1BIT.TMR1IE＝1和＆；TMR1IF＝1）{{PIMR1H.0x40；TMR1H＝0x40；// 65536（32768/2）＝16384 TMR1L= 0x00；LIDDITS.LATD0＝LATDITS.LATD0；} if（Py2BIT.TMR3IE＝1和AMP；和PIP2BITS。TMR3IF＝1）{PIR2BIT。TMR3IF＝0；TMR3H＝0x40；TMR1L= 0x00；锁存器。
以上来自于百度翻译 以下为原文 void high_priority interrupt HighISR(void) { if(PIE1bits.TMR1IE == 1 && PIR1bits.TMR1IF == 1){ PIR1bits.TMR1IF = 0; TMR1H = 0x40; // 65536-(32768/2) = 16384 TMR1L = 0x00; LATDbits.LATD0 = ~LATDbits.LATD0; } if(PIE2bits.TMR3IE == 1 && PIR2bits.TMR3IF == 1){ PIR2bits.TMR3IF = 0; TMR3H = 0x40; TMR1L = 0x00; LATDbits.LATD1 = ~LATDbits.LATD1; } } |
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此外，Initialize TMRxH和TMRXL在初始化过程中。不要打开计时器，直到所有的设置都已被设置。不要启用全局中断，直到所有的东西都被初始化。
以上来自于百度翻译 以下为原文 Also,
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对于QHB和1和0：谢谢，它工作。问题1：QHB提供。问题2：在启用定时器之前，我没有初始化TMRxH和TMRXL，根据规范，重置发生时TMRXH和TMRxL的初始化条件是未知的，导致时间不一致。问题3：我应该打开T。在所有设置就绪后，一旦启用定时器，它就开始运行包含未知值的相应寄存器，导致错误动作。问题4：与上面相同。
以上来自于百度翻译 以下为原文 To qhb and 1and0: Thank you, it works. Problem 1: as qhb offered it. Problem 2: I didn't initialize TMRxH and TMRxL before enable the Timer, according to spec, the initialization condition of TMRxH and TMRxL is unknown when reset occurs, resulting in time inconsistency. Problem 3: I should turn on the timer AFTER all setting is ready, once timer is enabled, it starts operating the corresponding registers in which unknown value is contained, resulting in errors action. Problem 4: as same as above. |
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这就是为什么你应该对它们进行初始化。否则，你的第一个时期将不同于所有其他。
以上来自于百度翻译 以下为原文 That is why you SHOULD initialise them. Otherwise your first period will be different to all the rest. |
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QHB：是的，我只想留下一份自己未来的记录，其他人可以参考。谢谢！
以上来自于百度翻译 以下为原文 To qhb: Yes, I just want to leave a record for future myself and else people for reference. Thank you! |
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