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我修改了AdCl微分器前置放大器项目,用PSoC 4 BLE先锋套件和附图中所示的加载单元工作。它最初工作,报告MVoT值在大约70(IIrc)和1024之间,这是最大值。
然后我想做什么用redexcite和yellowexcite引脚反向ADC读数之间的激励电压的极性幻想,要减去反向极性测量从正常极性测量作为一种手段来有效的解决双。在没有得到那个工作,但是,我回到我之前保存在这个变更项目。 问题是,现在第一个项目也不起作用。ADC值无变化时,传感器上的负载的变化。检查两个数字多用表,我可以看到,差分电压进入销bluesense和whitesense仍然变化始终与负载一如既往。测量out_1和out_2,之间的电压,但是,这应该是完全一样的是美联储的ADC,只读取0 V,偶尔漂流到0.1 mV。由于固件只计算到1 mV值,这mvolts总是等于previousvalue也被写入UART是有意义的。 我炸了我的眼镜吗?幸运的是,我有一个包或两个在路上,但我想知道如果运算放大器,实际上,油炸,或是我有一些其他的错误在我的项目,我失踪。我可以分享其余的项目太多,如果能帮助。 谢谢,Don。 PSOG模式 47.4 K 以上来自于百度翻译 以下为原文 I modified the ADC_Differential_Preamplifer project to work with a PSoC 4 BLE Pioneer Kit and with a load cell as shown in the attached schematic. It worked initially, reporting mVolt values between about 70 (IIRC) and 1024, which is the maximum. I then tried to do something fancy by using the redExcite and yellowExcite pins to reverse the polarity of the excitation voltage between ADC readings, intending to subtract the reversed-polarity measurement from the normal-polarity measurement as a means to effectively double the resolution. After failing to get that to work, however, I returned to the project I saved before trying this change. The problem is, now the first project doesn't work either. The ADC is showing no change of values when the load on the sensor changes. Checking with two DMMs, I can see that the differential voltage going into pins blueSense and whiteSense still varies consistently versus load as it always has. Measuring the voltage between Out_1 and Out_2, however, which should be exactly the same as is being fed to the ADC, reads only 0 V, occasionally drifting to -0.1 mV. Since the firmware only calculates down to values of 1 mV, it makes sense that mVolts is always equal to previousValue so that nothing is being written to the UART. Did I fry my opamps? Fortunately, I have another kit or two on their way, but I would like to know if the opamps are, in fact, fried, or whether I have some other error in my project that I am missing. I can share the rest of the project too, if that will help. Thanks, Don.
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30个回答
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这里是FRO的结果,OpAmp电流限制的技术支持
你好,Dana Knight, 我在这里复制了这个问题。当运算放大器的输出短路时,它将提供非常高的负载电流。 比数据表规范大得多。这将导致运算放大器损坏或损坏器件。 建议不要超过OPAP数据表规范。为了更好的操作,请使用 负载电阻大于输出电压/25Ma。 请告诉我,你还有什么疑问吗? 谢谢和问候, 拉米什湾 问候,Dana。 以上来自于百度翻译 以下为原文 Here is the result fro, Tech support on OpAmp current limiting - Hello Dana Knight, I reproduced the issue here. When the opamp output is short circuited, it will provide very high load current much greater than the datasheet specification. This will cause damage the opamp or damage the device. It is recommended not to exceed the opamp datasheet specification. For better operation, please use the load resistor which is greater than output voltage/25mA. Please let me know do you have any more queries. Thanks and Regards, Ramesh B Regards, Dana. |
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当我用欧姆计在模拟视图中观察运算放大器的输出和连接的输出引脚之间的电阻时,得到的结果是550欧姆。所以短路时的电流不应该超过9Ma@ 5V。我哪里出问题了?有一条只有200欧姆的秘密通道吗?甚至一些负电阻??)
鲍勃 以上来自于百度翻译 以下为原文 When I probe the resistance between an opamp's output and the connected output pin in the analog view using the ohm meter I get a result of ~550 ohms. So the current when shorted should not exceed 9mA @5V. Where do I go wrong? Is there a secret path with only 200 ohms? Or even some negative resistors?? ;-) Bob |
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我得到了荒谬相反的结果,但注意没有开关是在
这条路是一条直达路线。 此外,如欧姆表读数所示的容差为-57%至+83%。 以上来自于百度翻译 以下为原文 I get the absurd opposite result, but note no switches are in the path, eg. its a direct route. Also the tolerance as stated is - 57% to +83% for the ohmmeter readings. |
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占卜!我开了一个PSoC5项目,问题是PSOS4。
鲍勃 以上来自于百度翻译 以下为原文 Apollogize! I had opened a PSoC5 project and the question was for a PSoC4. Bob |
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这里是一个5LP结果,我让工具挑选引脚,结果直接
路由- 以上来自于百度翻译 以下为原文 Here is a 5LP result where I let tool pick pin, result a direct route - |
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显然不是我的一天,我调查了PGA而不是OpAMP。麻布和灰烬…
鲍勃 以上来自于百度翻译 以下为原文 Obviously not my day at all, I probed a PGA instead of the opamp. Sackcloth and ashes... Bob |
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快速更新:我终于有机会做一些更广泛的硬件测试在两个独立的BLE先锋套件。第一个是我在原来的帖子里写的,我以为我把煎饼煎了一下。不幸的是,第二个项目在同一个项目上使用,虽然只是短暂的,我一看到它不起作用就拔掉了它。我办公室里还有一个工厂包装板,所以也许我会在周末晚些时候找回,进行类似的测试。
结果:两个板上的四个运算放大器都作为电压跟随器工作良好。当配置为非反相运算放大器,增益约为1.45时,每个板上只有三的运算放大器工作。在两个板上,OA3不工作,只投入约50毫伏,无论输入。正如我之前注意到的,对于运放作为跟随器而不是运算放大器,在这两种情况之间唯一变化的是外部引脚P1.4。 如果我能在两个单独的板上吃油炸P1.4,我将如何避免在未来再次这样做,我会非常感激。我附上我创建的非常简单的项目来做这些测试。 PopRest.CyWrk.CaseV01.Zip 262.8 K 以上来自于百度翻译 以下为原文 Quick update: I finally had a chance to do some more extensive hardware testing on two separate BLE Pioneer Kits. The first is the one I wrote about in the original post, where I thought I had fried the opamps. The second was used, unfortunately, on the same project although only briefly, and I unplugged it as soon as I saw it wasn't working. I still have a factory-wrapped board at the office, so maybe I will try to retrieve it later this weekend for a similar test. The results: all four op amps on both boards work just fine as voltage followers. When configured as non-inverting op amps with a gain of about 1.45, only three of the op amps on each board worked. On both boards, OA3 did not work and only put out about 50 mV regardless of input. As I had noted earlier, for an op amp to work as a follower and not as an op amp, the only thing that changes between the two cases is external pin P1.4. Any thoughts on how I could have fried P1.4 on two separate boards, and how I can avoid doing that again in the future, would be most appreciated. I am attaching the very simple project that I created to do these tests.
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你正在煎炸一个PIN作为输入,没有明显的电流。
由于FDBK R的。 首先想到的是用一个二极管把铁轨钉在铁轨外面。 下降,那么它的寄生二极管将吸引大量电流。可能导致部分闭锁。 或ESD和PIN栅氧化物在输入被吹。 我没有看过TRM,但是你能把那个OA路由到P1.4以外的PIN吗? 它被限制了吗?可能是后者,因为它是PSoC 4,这是高度受限的。 有一种想法,因为PIN连接到OA输入,因此暂时不画电流。 将一个1 k的系列R设为PIN,因此如果由于L效应而引起瞬变 在电路中的某个地方,将限制电流。注意,除非ESD,否则对ESD什么都不做。 添加两个二极管,以及引脚打开时,引脚是在Vssa以外,Vdda。 问候,Dana。 以上来自于百度翻译 以下为原文 You are frying a pin configed as input, no appreciable current flow due to FDBK R's. First thought that comes to mind is taking this pin outside either rail by a diode drop, then its parasitic diodes will draw a lot of current. May cause part latchup. Or ESD and pin gate oxide in the inputs getting blown. I have not looked at TRM, but can you route that OA to a pin other than P1.4, or is it constrained ? Probably the latter since it is PSOC 4, which is highly constrained. One thought, since pin is connected to OA input, hence not drawing current, temporarily puts a series R of say 1 K to pin, so that if you are causing transients due to L effects somewhere in circuit that will limit current. Note that will do nothing for ESD unless you add a couple of diodes as well to pins to turn on when pin is taken outside Vssa, Vdda. Regards, Dana. |
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进一步随访:
我把我的OA3测试作为一个运放(相对于跟随者)用PSoC模块返回到底板上,但是用一个USB墙壁疣来驱动基板,而不是我的开发笔记本电脑的USB端口。它奏效了。然后我试着用2032个硬币电池供电的底板。这也是有效的,但运算放大器在2.4 V,而不是3.3 V,我可以走出运算放大器时,由USB供电的3.3 V选择由J15选择。 我确实为此创建了一个案例,但我想知道它是否与P1.4是USB UART的RX有关。奇怪的是,P1.5,这是对USB UART的TX,似乎没有受到影响。 以上来自于百度翻译 以下为原文 Further follow-up: I redid my test of OA3 as an op amp (versus a follower) with the PSoC module back in the baseboard, but with the baseboard powered from a USB wall-wart as opposed to the USB port of my development laptop. It worked. I then tried it with the baseboard powered by the 2032 coin cell. That also worked, but the opamp topped out at 2.4 V instead of the 3.3 V I can get out of the op amps when powered by USB with the 3.3 V setting selected by J15. I did create a case for this, but I am wondering if it has something to do with P1.4 being the RX of the USB UART. Strange, though, that P1.5, which is the TX for the USB UART, doesn't seem to be affected by that. |
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我认为你看到P1Y4连接到PSoC 5LP输出的影响。
引脚,而P1Y5连接到PSoC 5LP输入引脚。从用户 手动- 问候,Dana。 以上来自于百度翻译 以下为原文 I think you are seeing the effects of P1_4 connected to a PSOC 5LP output pin, whereas P1_5 is connected to a PSOC 5LP input pin. From the user manual - Regards, Dana. |
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嗯:
UART RX意味着PSoC在接收端,这条线由PSOC5KITPROG驱动。UART-TX意味着PSoC4在发送端,PSoC5正在接收。 在你的情况下,这意味着PSoC5可能会驱动到低电平,而PSoC4试图把它拉到更高的电压(这甚至可能是所有测试的情况)。我不确定PSoC5UART是否只有当加载到驱动程序的PC上时才激活。 您的测试似乎表明该端口仍在工作。在你的项目中,你也可以使用其他别针,并以此方式强制使用其他opAMP。或者在基板上移除R52/R53来分割UART线。 以上来自于百度翻译 以下为原文 Uh-Uh :( UART-RX means the the PSoC is on the receiving side, and this line gets driven by the PSoC5 KitProg. UART-TX means that the PSoC4 is on the sending side and the PSoC5 is receiving. In your case this means that probably the PSoC5 was driving to line low, while the PSoC4 tried to pull it to a higher voltage (this might even be the case for all your tests). I'm not sure whether the PSoC5 UART is only active (meaning driving the lines actively) when the board is attached to a PC with the drivers loaded. Your test seem to indicate that the port is still working. You can either, in your project, use other pins and force usage of other OpAmps that way. Or you remove R52/R53 on the base board to split the UART lines. |
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我认为在KIT用户指南中应该有一些(突出的)警告,这意味着OPAP中的一个不能被充分利用。
以上来自于百度翻译 以下为原文 I think there should be some (prominent) warning in the kit user guide about that - it means that one of the OpAmps cannot be used fully. |
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果然我把销子翻过来了。
问候,Dana。 以上来自于百度翻译 以下为原文 Sure enough I did have the pins reversed. Regards, Dana. |
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快速的方法是建立一个测试项目,只是设置opAMP作为追随者,
并输入一个信号并查看输出。信号必须偏移, 所以看一下使用R除法EDN附带的文章。 问候,Dana。 AdPoT负输入30.Zip 644.5 K 以上来自于百度翻译 以下为原文 Quick way is setup a test project, just set OpAmps as followers, and input a signal and look at outputs. Signal has to be offset, so look at using R divider edn article attached. Regards, Dana.
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重新短路的输出情况。
我在运放输出N沟道和P沟道的考验,我对前者有7.8欧姆,4欧姆的~后者。 奇怪了,通常源体效应对P通道使其具有更高的导通电阻。可以是F-()的非 IDAC的线性度,不确定。 总之,没有双关,输出是否短路或轨道,而OpAmp是被迫的,将导致 大量流动。我猜它会把金属层路由的源极/漏极输出的N或P通道 模具。 问候,Dana。 以上来自于百度翻译 以下为原文 Re the shorted output case. I did a test on the OpAmp output N Channel and P Channel, I got 7.8 ohms on the former, ~ 4 ohms on the latter. Odd in that normally source bulk effect on P Channel causes it to have higher Rdson. Could be a f() of the non linearity of the Idac, not sure. So in short, no pun intended, the output if shorted to either rail, while OpAmp is being driven to the other, will cause mucho mA to flow. My guess is it could take out metal layer route to source/drain of the output P or N channel on the die. Regards, Dana. |
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欢迎来到论坛,Don。
当我读到你的示意图时,你用两个PSoC引脚提供激励电压,所以输入到你的运算放大器永远不会超过限制。它可能是(但你的措施显示出不同的),你吹奏你的输出引脚短路。 您是否更改了代码并删除了组件所需的初始化? 鲍勃 以上来自于百度翻译 以下为原文 Welcome in the forum, Don. When I read your schematic right, you are supplying the excitation voltages by using two PSoC pins., so the input to your opamps will never exceed the limits. It only may be (but your measures show something different) that you blew your output pins by shorting them. Can it be the case that you changed your code and deleted some of the initialization required for the components? Bob |
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我已经提交了案件来看,如果运放的输出引脚可以做空
钢轨会导致故障。大多数OAS都受到保护,或者本质上是由于 设备设计,不受短裤损坏。然而,它们被破坏了。 当然,由于电压过高。 问候,Dana。 以上来自于百度翻译 以下为原文 I have filed a CASE to see if shorting OpAmp output pin to either rail would result in failure. Most OAs are protected, or intrinsically due to device design, not damaged by shorts. They are, however, damaged for sure by excessive voltage. Regards, Dana. |
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