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我的名字是乔治。 我是一名电气工程专业的学生,我即将实施DV-S发射器。 问题是我不知道选择哪种cilicon器件以及从所有可用的板中选择哪种板! 我很困惑 :)! 所以我想知道是否有人已经尝试过这个或者可以建议我使用合适的设备! 谢谢大家! 以上来自于谷歌翻译 以下为原文 Hello, my name is George. I'm an electrical engineering student and I'm about to implement a DV-S transmiter. The problem is that I don't know what cilicon device to choose and what board to choose from all these available! I'm so confused :)! So I would like to know if there is anyone that has already tried this or can suggest me with a proper device to work with! Thank you all in advance! |
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8个回答
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我在Virtex-4的发射器中完成了DVB-RS,因为那是当时最好的设备。
如果我现在开始使用Virtex 5甚至是最新的Spartan 以上来自于谷歌翻译 以下为原文 I've done DVB-RS in a transmitter in a Virtex-4 as that was the best device at the time. If I were starting now I'd use a Virtex 5 or even the latest Spartan |
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Thanx快速回答cbemlahe!
我想我会选择Virtex-5 LX FPGA ML501评估平台。 你用什么工具链来实现 整件事?! 我正在考虑使用ISE和System Generator,但我 对我的系统生成器的代码生成有第二个想法 从来没用过它! 欢迎提供有关该主题的任何信息 太!! 再次感谢大家! PS:有没有人知道System Generator中的Reed Solomon块?! 我把它看作是我大学购买的系统生成器版本中的模拟块,但有人告诉我,除非你单独购买,否则这个块不能用于代码生成!这是真的吗?!Thanx再次!;) 以上来自于谷歌翻译 以下为原文 Thanx for the quick answer cbemlahe! I think I'm going to go with the Virtex-5 LX FPGAML501 Evaluation Platform. What tool chain did you use to implement thewhole thing?! I'm thinking about using ISE and System Generator but Ihave second thoughts on the code generation of System Generator, as Ihave never used it before! Any information on that subject are welcometoo!! Thank you all in advance again! PS: Does anyone know about Reed Solomon block in System Generator?! I've seen it as a simulation block in a System Generator version bought by my university but someone told me that this block cannot be used for code generation unless you buy it seperately!Is that true?!Thanx again!;) |
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我根本不了解System Generator - 随着我对DSP设计的深入了解,我将会关注它。
我自己做了我的Reed Solomon编码器。 编码是容易的部分,解码是困难的! 我只是使用了ISE10.1 以上来自于谷歌翻译 以下为原文 I don't know System Generator at all - its something I'm going to look at as I get more into DSP designs. I did my Reed Solomon encoder myself. Encoding is the easy part, decoding is the hard bit! I simply used ISE10.1 |
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我将尝试使用System Generator,如果我不实现它,我将直接在VHDL中进行。
你有什么建议(书籍,链接等),我可以在哪里找到RS及其VHDL实现的信息? 请记住,我不是非常“流利”的VHDL,我不想只是复制它! Thanx帮忙! 以上来自于谷歌翻译 以下为原文 I'll try with System Generator and if I xan't implement it i will do it directly in VHDL. Do you have anything to suggest (books, links etc.) as to where I can find info on RS and its VHDL implementation? Please keep in mind im not very "fluent" in VHDL and that I dont want to just copy it!! Thanx for helping! |
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没有直接的真实文本。
RS编码不是很难或不同于CRC,我确信有很多有用的网站可以解释它。 Watkinson的数字音频艺术有一些简单的图表可以解释它,但我不是在它的基础上! 以上来自于谷歌翻译 以下为原文 No real texts to speak of directly. RS encoding isn't do hard or different from CRCs and I'm sure there are lots of useful websites explaining it. Watkinson's Art of Digital Audio has some simple diagrams that explains it but I'd not by it on that basis! |
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我明白了!我会通过网络和东西检查一下!对你的帮助太多了!
以上来自于谷歌翻译 以下为原文 I see!I'll check through the web and stuff!Thanx a lot for your help!! |
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再一次问好!
我检查了这块板 - > Virtex-5 LX FPGA ML501评估平台,但它只支持Virtex5 LX系列! 它是否足够大以适应我的整个项目? 我必须实现整个DVB-S发送器(Reed Solomon编码,卷积交织器,卷积编码......)直到I和Q输出! 你的Virtex4有多大?!? 我必须确保我的FPGA符合设计要求,因为我的大学将会购买电路板,我不能购买它然后说ooops它不适合!!:p !! Thanx再次提前! 以上来自于谷歌翻译 以下为原文 Hello again! I checked this board -> Virtex-5 LX FPGA ML501 Evaluation Platform but it supports only family Virtex5 LX! Is it going to be large enough to fit my whole project? I have to implement the whole DVB-S transmiter (Reed Solomon coding, convolutional interleaver, convolutional coding ...) up to the I and Q outputs! How large was your Virtex4?!? I have to be sure that my FPGA will fit the design because the board will be baught by my university and I can't buy it and then say ooops it doesn't fit!!:p !! Thanx in advance again! |
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如何在不使用移位寄存器的情况下实现卷积交织器?基于ram的方法是否比移位寄存器方法更有效?
以上来自于谷歌翻译 以下为原文 How can I implement convolutional interleaver without unising shift registors??Is a ram based approach more efficient than a shift register approach?? |
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