可以使用单个状态机但多个独立进程的vhd文件吗？

嗨，
VHDL架构中的进程或FSM数量基本没有限制。
需要提及的是，FSM已经是一个用户编码的构造，由一个或多个进程组成，而不是VHDL语言属性。
通常人们会发现设计风格的描述，这提出了一些在实际应用中被发现有用的限制。
要么是为了提高代码的可维护性，要么是为了避免在不小心使用某些语言元素时可能发生的常见问题。
在这里和comp.lang.vhdl上讨论不同的设计风格有许多线程。
请查看ISE语言模板（“灯泡”图标）。
在那里你可以找到使用多个进程的FSM示例（两个或三个，我不确定）。
但是，出于某些原因，许多设计人员更喜欢FSM的单过程描述。
多进程描述通常用于学术教学。
因此，学生可以在其代码中找到FSM的不同功能块（状态寄存器，分支逻辑，输出逻辑）。
对于经验丰富的设计师来说，这不是必需的。
复杂的设计可以在一个架构中拥有多个FSM。
有时，编码一些小的互连FSM比一个大而笨拙的怪物FSM更有效。
有一个很好的综合 
Eilert



以下为原文

Hi,
there is basically no limit in the number of processes or FSMs in a VHDL architecture.
It needs to be mentioned that an FSM already is a user coded construct consisting of one or more processes, and not a VHDL language property.
 
Often one finds descriptions of design styles, which propose some limitations that have been found useful in practical applications. Either to improve maintainability of code, or to avoid common problems that can happen when using some language elements carelessly.
There are many threads discussing different design styles here and on comp.lang.vhdl.
 
Please take a look at the ISE Language Templates (the "Lightbulb" icon).
There you find FSM examples using multiple processes (two or three, I'm not sure).
However, many designers prefer a one-process description for FSMs for some good reasons.
 
The multi-process descriptions are often used for academic teaching. So the students can find the different functional blocks of a FSM in their code (State register, Branch logic, Output logic).
This is not neccessary for an experienced designer.
 
And complex designs can have multiple FSMs in a single architecture.
Sometimes it is more efficient to code a number of small interconnected FSMs than one big and clumsy monster-FSM.
 
Have a nice synthesis
  Eilert
 
 
 
 
 

亲爱的艾利特，
感谢您花时间全面回答我的问题。
这很有用。
谢谢。
法哈德



以下为原文

Dear Eilert,
I appreciate your taking the time and answering my question so comprehensively. It was useful. Thanks.
Farhad

farhad.rafraf写道：
大家好，
我已经读过每个vhd文件应该只有一个状态机，因此可以整齐地完成合成。
我的问题是，我们可以在一台状态机中拥有多个独立的进程吗？
或者这是否会导致实施程序中出现无法预测的错误？
简而言之，我可以使用单个状态机但多个独立进程的vhd文件吗？
谢谢
当然，您可以在实体中拥有任意数量的流程和连续分配。
但是 - 如果将所有内容都放入一个实体中，则很难维护设计。
因此，为了理智（您和可能需要维护代码的人），您应该考虑以下经验法则：
1）请为每个源文件提供一个实体/体系结构。
2）考虑功能块并尝试将相关的功能/逻辑保存在一个实体中。
3）考虑重用并保留可能在其自己的实体（或多个实体）中的多个设计中有用的内容。
----------------------------是的，我这样做是为了谋生。



以下为原文

farhad.rafraf wrote:
Hello guys,
I have read that there should be only one state machine per vhd file, so that synthesis can be done neatly. My question is that, can we have multiple independent processes in a single state machine? Or does this lead to un-predictable bugs in implemented program?
Briefly, can I have a vhd file with a single state machine but multiple independent processes?
Thanks

Of course you can have as many processes and continuous assignments as you want in an entity.
 
HOWEVER - it becomes difficult to maintain a design if you throw everything into one entity.
 
So for the sake of sanity (yours and whoever might have to maintain your code), you should consider the following rules of thumb:
 
1) One entity/architecture per source file, please.
 
2) Consider functional blocks and try to keep related functions/logic in one entity.
 
3) Consider reuse and keep things that might be useful in more than one design in their own entities (or more than one entity).
----------------------------Yes, I do this for a living.