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嗨, 我目前正在研究STC3115。我正面临着它的问题。奴隶我的意思是当我做i2c测试时没有检测到STC3115。我的平台是linux。 我已经检查了电压电平,看起来都很好.SDA和SCL线已被拉高.RStiO引脚被拉高.BATD / CD通过1k电阻接地,因为我们没有使用它.VIN由电池提供VCC由监管机构提供。 我无法弄清楚我的硬件连接是否存在任何问题。如果我需要对硬件进行任何更改,请引导我,以便在探测其从属地址时检测到STC3115。 将等待你的rply #stc3115-I2C-问题定时 以上来自于谷歌翻译 以下为原文 , Hi, I am currently working on STC3115.I am facing problem with it.The slave i mean STC3115 is not getting detected when i do i2c test.My platform is linux. I have checked the voltage levels,itseems all are fine.SDA and SCL lines have been pulled up.RSTIO pin is pulled up.BATD/CD is grounded through 1k resister since we are not using it.VIN has been supplied from the battery and VCC has been supplied from regulator. I could not figure out any problems with my hardware connections.Please guide me if i need to do any changes with my hardware so that STC3115 gets detected when i probe for its slave address. Will be waiting for your rply #stc3115-i2c-issue-timing |
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出现这种一般的I2C问题有几个原因:
- STC3115电源电压过低(必须有VCC> 2.7V) - I2C从器件地址不正确。因此,燃气表不响应另一个地址。 正确的地址是: #define STC3115_SLAVE_ADDRESS_7BIT 0x70 #define STC3115_SLAVE_ADDRESS_8BIT 0xE0 - 不遵守I2C规范的建立时间和保持时间。 如果违反I2C时序,器件将不会解码I2C信号。 检查I2C的数据表要求约束。 - 两个I2C信号(SCL和SDA)的上升沿和下降沿同时发生,两者之间没有延迟。 这违反了I2C时序。因此STC3115可能会错过一个上升沿。 调整I2C主设备的信号,以在SCL和SDA信号的上升/下降沿之间获得小的延迟。 问候 以上来自于谷歌翻译 以下为原文 This general I2C issue can appear for several reasons: - STC3115 power supply voltage is too low (must have VCC > 2.7V) - The I2C Slave Address is not correct. Thus the gas gauge do not respond to another address. The correct address is: #define STC3115_SLAVE_ADDRESS_7BIT 0x70 #define STC3115_SLAVE_ADDRESS_8BIT 0xE0 - The Setup time and Hold time of I2C specification are not respected. In case of violation the I2C timing, the device won't decode the I2C signal. Check the datasheet requirement constrains for I2C. - The rising edge and falling edge of both I2C signals (SCL and SDA) occur at the same time, without a delay in between. This violate the I2C timing. Thus the STC3115 could miss one rising edge. Adjust the signals of the I2C master device to get a small delay between both rising/falling edge of SCL and SDA signals. Regards |
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