PIC32MZ DMA SPI停止

您好，我正在研究一个应用程序，它读取SPI数据而不使用DMA到本地缓冲区中。在选择处理这个缓冲器之后，我想用DMA将它转发到另一个SPI信道上。到第二个PIC32 MZ。我所有这些工作都没有DMA，但我遇到麻烦了，将DMA添加到PIC32到PIC32 SPI信道。DMA通道2中断将触发2次，然后停止。所有中断使能寄存器仍然是设置。DMA通道3中断不会着火。在我的设置中有什么错误导致了这一点吗？我希望得到连续的DMA ISR调用。



      以下为原文

    Hello,

I am working on an app that reads SPI data without DMA into a local buffer. After optional processing this buffer I want to relay this out on another SPI channel using DMA. to a second PIC32MZ. I have all of this working without DMA, but I am running into trouble by adding DMA to the PIC32 to PIC32 spi channel.

DMA channel 2 interrupt will fire 2 times then stop. All interrupt enable registers are still set.
DMA channel 3 interrupt will not fire.

Is there something wrong in my setup that is causing this? I expect to get continuous DMA ISR calls.

void Init_Bus_Dma_Tx(void) {
    // DMA channel 2.

    physSourceDma = (unsigned int) &busBufferTx & 0x1FFFFFFF;
    physDestDma = (unsigned int) &SPI3BUF & 0x1FFFFFFF;

    IEC4bits.DMA2IE = 0; // Disable the DMA interrupt.
    IFS4bits.DMA2IF = 0; // Clear the DMA interrupt flag.

    DMACONbits.ON = 1; // Enable the DMA module.

    DCH2CONbits.CHPRI = 3; // Channel priority.
    DCH2CONbits.CHAEN = 1; // Channel Automatic Enable bit.

    DCH2SSAbits.CHSSA = physSourceDma; // Source start address.
    DCH2DSAbits.CHDSA = physDestDma; // Destination start address.

    DCH2SSIZbits.CHSSIZ = 32; // Source bytes.
    DCH2DSIZbits.CHDSIZ = 32; // Destination bytes.
    DCH2CSIZbits.CHCSIZ = 2; // Bytes to transfer per event.

    DCH2ECONbits.CHSIRQ = 0x8F; // SPI2 RX complete interrupt
    DCH2ECONbits.SIRQEN = 1; //Start channel cell transfer if an interrupt matching CHSIRQ occurs

    DCH2INTbits.CHBCIE = 1; // Channel block transfer complete interrupt.
    DCH2INTbits.CHERIE = 1; // Channel Address Error Interrupt.
    IPC34bits.DMA2IP = 7; // DMA interrupt priority.
    IPC34bits.DMA2IS = 3; // DMA subpriority.
    IEC4bits.DMA2IE = 1; // DMA interrupt enable.

    DCH2CONbits.CHEN = 1; // Channel enable.
}

void Init_Bus_Dma_Rx(void) {
    // DMA channel 3.

    physSourceDma = (unsigned int) &SPI3BUF & 0x1FFFFFFF; // From:
    physDestDma = (unsigned int) &busBufferRx & 0x1FFFFFFF; // To:

    IEC4bits.DMA3IE = 0; // Disable the DMA interrupt.
    IFS4bits.DMA3IF = 0; // Clear the DMA interrupt flag.

    DMACONbits.ON = 1; // Enable the DMA module.

    DCH3CONbits.CHPRI = 3; // Channel priority.
    DCH3CONbits.CHAEN = 1; // Channel Automatic Enable bit.

    DCH3SSAbits.CHSSA = physSourceDma; // Source start address.
    DCH3DSAbits.CHDSA = physDestDma; // Destination start address.

    DCH3SSIZbits.CHSSIZ = 32; // Source bytes.
    DCH3DSIZbits.CHDSIZ = 32; // Destination bytes.
    DCH3CSIZbits.CHCSIZ = 2; // Bytes to transfer per event.
   
    DCH2ECONbits.CHSIRQ = 0x9C; // SPI3 TX complete interrupt
    DCH2ECONbits.SIRQEN = 1; //Start channel cell transfer if an interrupt matching CHSIRQ occurs

    DCH3INTbits.CHBCIE = 1; // Channel block transfer complete interrupt.
    DCH3INTbits.CHERIE = 1; // Channel Address Error Interrupt.
    IPC34bits.DMA3IP = 7; // DMA interrupt priority.
    IPC34bits.DMA3IS = 3; // DMA subpriority.
    IEC4bits.DMA3IE = 1; // DMA interrupt enable.

    DCH3CONbits.CHEN = 1; // Channel enable.
}

void __ISR(_DMA2_VECTOR, ipl7AUTO) __DMA2_IntHandler(void) {

    CS3_DESELECT();

    DCH2INT &= ~0xff; //Clear the int flags.

    IFS4bits.DMA2IF = 0; // Clear the DMA interrupt flag.
}

void __ISR(_DMA3_VECTOR, ipl7AUTO) __DMA3_IntHandler(void) {

    DCH3INTbits.CHBCIF = 0; // Clear the Channel block transfer complete interrupt
    IFS4bits.DMA3IF = 0; // Clear the DMA interrupt flag.
}