DMA设置问题

你好，罗宾，
以下是你所附项目的一些评论。
TopDead DMA配置：
触发解除和重新编译（对于所有描述符）：因为您的输入触发器不是一个符合DMA的触发器（即计数器的溢出输出很可能是一个大约1／4.8m宽的脉冲），因此有可能用“Reigigg”立即重新获得DMA。ER立即选择“。在从溢出信号再次触发DMA之前，您可以选择16或4个慢时钟（50 MHz）周期。这在项目中是不明显的，但是在最后的项目中，您应该保持在MyDebug描述符4配置中：如果希望在完成描述符4之后停止再次触发描述符1，则选择触发器输入类型为“每个触发器的整个描述符传输”-这将仅限于从3接收的触发器转移窗体描述符4。在描述符完成后，您可以交替禁用该通道，并在中断中重新启用它。中断和触发器输出：选择以在“描述符完成”上生成中断。因为整个描述符链上的触发器永远不会生成触发器，因为您已经以循环方式尾随所有描述符（无休止的）。由于（我相信）您的目标是在完成描述符4的时候生成中断和下一个触发器，应该选择这个选项。
代码：
代码中的“TMP”已经是一个指针，即代码中“TMP”的引用已经意味着“& TMP（0）”。因此，请在目标地址配置中的TMP之前删除“&”。Cyth-DMAiRealthRoMyStdStAdvess（和；DMAYRG2TMPA描述符1，TMP）；Cyth-DMAYRealthRoMyStdStAdvess（和；DMAYRIG2TMPA描述符2，TMP + 1）；因此，您还没有初始化描述符，这也是重要的（在设置SRC/DST地址之前添加下面的代码）
Cyth-DMAiRealthRosithIn（&；DMAYRe2TMPa描述符1，和DMAYRG2TMPA描述符1A CONFIG）；
Cyth-DMAiRealthRosithIn（&；DMAYRe2TMPa描述符2，和DMAYRG2TMPA描述符22CONFIG）；
Cyth-DMAiRealthRosithIn（&；DMAYRe2TMPa描述符3，和DMAYRG2TMPA描述符3A CONFIG）；
Cyth-DMAiRealthRosithIn（&；DMAYRe2TMPa描述符4，和DMAYRG2TMPA描述符4A CONFIG）；
现在，随着上面的更改，代码似乎将数据从状态RISS传输到TMP。
如果需要中断，他们将ISR组件映射到TopDesign中的DMA中断输出。初始化它在主，映射到你的ISR，并启用DMA中断操作。
让我知道这是否有帮助。
当做，
Meenakshi Sundaram R



     以下为原文
  Hello Robin,
 
Here are some comments on the project you attached -
 
TopDesign DMA configuration:

• Trigger deactivation & retriggering (for all descriptors): Since your input trigger is not a DMA compliant trigger (i.e. the overflow output from the counter is most likely a pulse of about 1/4.8M width) there is a possibility of the DMA getting retriggered immediately is high with the "retrigger immediately option". You can choose either 16 or 4 SlowClk (50 MHz) cycles before triggering the DMA again from the overflow signal. This is not evident in the project but in the final project, you should keep this in mind
  
• Descriptor 4 configuration:
  

• If you want to stop triggering Descriptor 1 again after completion of Descriptor_4, then select Trigger Input type as "An entire descriptor transfer per trigger" - this will only perform Descriptor_4 transfer from the trigger received from 3. You can alternately disable the channel on the completion of the descriptor as well and re-enable it in the interrupt.
  
• Interrupt & Trigger output: Select to generate the interrupt on "Descriptor completion". As trigger on entire descriptor chain will never generate the trigger as you have tailed all the descriptors in a circular fashion (endless). Since (and I believe) your goal is to generate interrupt and next trigger on completion of Descriptor_4, this option should be selected.
  

 
Code:

• "tmp" in your code already is a pointer i.e. the reference to "tmp" in the code already means "&tmp[0]". So please remove the '&' before the tmp in the destination address config. Cy_DMA_Descriptor_SetDstAddress(&DMA_Reg2Tmp_Descriptor_1, tmp);  Cy_DMA_Descriptor_SetDstAddress(&DMA_Reg2Tmp_Descriptor_2, tmp+1); ... so on
  
• You are not initializing the descriptors, which is important as well (add the below code before setting the src/dst addresses)-
  

 
     Cy_DMA_Descriptor_Init(&DMA_Reg2Tmp_Descriptor_1, &DMA_Reg2Tmp_Descriptor_1_config);
    Cy_DMA_Descriptor_Init(&DMA_Reg2Tmp_Descriptor_2, &DMA_Reg2Tmp_Descriptor_2_config);
    Cy_DMA_Descriptor_Init(&DMA_Reg2Tmp_Descriptor_3, &DMA_Reg2Tmp_Descriptor_3_config);
    Cy_DMA_Descriptor_Init(&DMA_Reg2Tmp_Descriptor_4, &DMA_Reg2Tmp_Descriptor_4_config);
 
And now with the above changes, the code seem to transfer the data from status regs to tmp.
 
If you want interrupt, them map an ISR component to the DMA interrupt output in TopDesign. Initialize it in the main, map it to your ISR and enable DMA interrupt for operation.
 
Let me know if this helps.
 
Regards,
Meenakshi Sundaram R

亲爱的MeNaKeSunDaLaR.
谢谢，在您的评论之后，项目已经更新，现在步骤1工作良好。
因此，我们添加下一个DMA来执行我们的目标的下一步。
当前，第二个DMA保存到循环缓冲器中：但只有一个镜头，因为最新的描述符禁用了该通道。
向下计数器值（TMP＝& 7T 7E…的字节2）保存在循环缓冲器中：
-没有丢失的事件
描述符似乎是正确链式的。
但是，如果我们不禁用信道（在最后一个描述符中），循环缓冲区就不起作用了。
在这种情况下，我们不理解循环缓冲区中的值列表。
如何正确配置第二个DMA？
请在附件中找到最新的项目和你的评论。
你的，
罗宾。
D.CyWrk.CaseV02.Zip
8兆字节



     以下为原文
  Dear Meenakshi Sundaram R,
 
Thank you, following your remarks the project has been updated and now step 1 works fine.
So we add the next DMA to perform the next step of our goal.

 
Currently, this second DMA saves into circular buffer : but only one shot because the latest descriptor disables the channel.
Down counter values (byte 2 of tmp => 7F 7E ...) are saved in circular buffer :
- without lost event
- descriptors seems correctly chained.

however, if we doesn't disable the channel (in last descriptor), the circular buffer doesn't works.
In this case, we don't understand the list of value into the circular buffer.
 
How configure correctly this second DMA?

Please find in attachment the updated project with your remarks.
 
yours,
Robin.

•   DMA.cywrk.Archive02.zip 8.0 MB  
  
  

你好，罗宾，
我看了一下这个项目，有一些注释：
Topdesign：
中断-请将ISR组件配置为“自动选择”，而不是“上升沿”。由于中断是从另一个组件派生而不是由ISR组件本身生成的，因此建议将其设置为“自动选择”DMA 2配置-我看到您的意图是3x8 Word循环缓冲区——即您的缓冲区大小是24，但您希望每8个EL发出通知/中断。转让（？）？）如果是，那么你不需要3个描述符。您所需要的是一个带有3个X循环的描述符——PSoC 6具有2D传输模式的原因。因为所有3个8字节的传输都是相似的（每个传输一个元素传输一个元素，每8个元素传输一个中断），你就可以使用一个单一的DeRiver。只需要多个描述符，如果你正在处理不同的触发输入/输出配置。DMA配置上的另一个次要注意事项DMA 2的触发器输入来自另一个DMA，这意味着触发器是DMA兼容的（不像DMA 1的情况）。所以你可以很好地使用“RigiggEnter”选项来选择DMA 2的描述符。
代码：
中断服务例程：您还需要清除DMA通道的中断：“CythDMANCHANNELL清除中断（DMAYTMP2CURFBUFDWHD DWAXHOLD HYW，DMAYTMP2CURCUFFFWDWHYL信道号）；DMA通道/描述符init不启用通道中断，您需要手动为代码启用它们。要进入产生中断和服务，它在启用信道之前调用这个：CythDMACHANNEL SUSET中断屏蔽（DMAYTMP2CURCUFBUDWHD DWAB块HW，DMAYTMP2CURCUBFFWD DWEWHZ信道号，CyDMA内部掩码）；
上面的代码应该正常运行。
为什么要保持“启用”通道引起一个问题——你应该注意到，在调试时，DMA操作在后台发生，即即使当CPU被停止时，DMA仍保持传输，只要它被启用并被配置为传输数据（当您离开信道启用的情况下）。Nd链的描述符）。因此，当调试器从内存中获取数据时，很有可能在获取数据时，可以在不同的实例中获取数据，并且每个实例可能导致不同的捕获值（因为DMA在内存中不断更新这些值）。为了使示例按照预期运行，可以在描述符完成之后禁用信道，并在为ISR服务之后重新启用它。也就是说，在“TrimeNeTMP2CurcBuf”函数中，添加“CythDMANCHANNEL使能（DMAYTMP2CURCUFFUDWHOWDWHOLD BIXHOW HW，DMAYTMP2CURCUBFFWDWHYWA信道号）”，这使得ISR服务后的信道成为可能。现在可以在ISR中保留断点并正确监视缓冲区。
让我知道这是否有帮助。
当做，
Meenakshi Sundaram R



     以下为原文
  Hello Robin,
 
I took a look at the project and have some notes:
 
Topdesign:

• Interrupts - Please configure the ISR components to be "Auto-select" rather than "Rising-edge". Since the interrupt is derived from another component and not generated by the ISR component itself, it is recommended to set it to "Auto-select"
  
• DMA 2 configuration - I see that your intention is 3x8 WORD circular buffer - i.e. your buffer size is 24 but you want a notification/interrupt every 8 element transfer (??). If yes, then you dont need 3 descriptors. All you need is one descriptor with 3 X loops  - the reason why PSoC 6 has a 2D transfer mode. Since all the 3 8-byte transfers are similar (transfer one-element per transfer and interrupt every 8 element transfer), you can make use of a single desriptor. Only go for multiple descriptors, if you are dealing with different trigger input/output configurations.
  
• Another minor note on the DMA configuration - DMA 2's trigger input is from another DMA, which means the trigger is DMA compliant (unlike DMA 1's case). So you can very well use "Retrigger Immediately" option for the DMA 2's descriptor.
  

 
Code:

• Interrupt service routines: You need to clear the DMA channel's interrupt as well: "Cy_DMA_Channel_ClearInterrupt(DMA_Tmp2CircBuf_DW__BLOCK_HW, DMA_Tmp2CircBuf_DW__CHANNEL_NUMBER);"
  
• The DMA channel/descriptor Init does not enable the channel interrupts, you need to manually enable them for the code to enter generate the interrupt and service it - call this before enabling the channel: Cy_DMA_Channel_SetInterruptMask(DMA_Tmp2CircBuf_DW__BLOCK_HW, DMA_Tmp2CircBuf_DW__CHANNEL_NUMBER, CY_DMA_INTR_MASK);
  

 
With the above the code should function properly.
 
Now to why keeping the channel "Enabled" causes an issue - You should note that while debugging, DMA operation is happening in the background i.e. even when CPU is halted DMA keeps transferring as long as it is enabled and configured to transfer stuffs (the case when you leave the channel enabled and chain the descriptors). As a result, when the debugger fetches the data from memory, there is a good chance that when the data is fetched it might be fetched at different instances and each instance might result in a different capture value (as DMA is constantly updating these values in memory). In order for the example to function as expected, you can disable the channel after the descriptor completion and re-enable it after servicing the ISR. i.e. in the "routine_Tmp2CircBuf" function, add "Cy_DMA_Channel_Enable(DMA_Tmp2CircBuf_DW__BLOCK_HW, DMA_Tmp2CircBuf_DW__CHANNEL_NUMBER);" - this enables the channel after the ISR is serviced. Now you can keep a breakpoint in the ISR and monitor the buffer properly.
 
Let me know if this helps.
 
Regards,
Meenakshi Sundaram R

亲爱的各位，
通过您的贡献，DMA原则（为我们的需要）被这个小项目验证。
我添加了TopDead的概述来说明这个项目：
我们的目标是用DMAS从TopDead到CORTEXM4核心的环形缓冲器进行传输。
顶级设计----------------CORTEXM4
事件-gt；StutsReg & gt；TMP-&循环缓冲区[]
它可能对PSOC6的其他用户有用，所以请在附件中找到我的项目的存档。
你的，
罗宾。
DMA2.CYWRK.SARVEVE02.ZIP
8.2兆字节



     以下为原文
  Dear all,
With yours contributions, the DMA principle (for our need) is validated by this small project.
 
I add an overview of the TOPDesign to illustrate the project :
our goal is the transfer with DMAs of values from topDesign to a circular buffer of cortexM4 core.
 
---- top design ------- // ---- cortexM4 ------
event -> statusReg -> tmp -> circularBuffer[]
 

 
it could be useful for other users  of PSoC6, so please find in attachment the archive of my project.
 
yours,
Robin.

•   DMA2.cywrk.Archive02.zip 8.2 MB