PIC24FJ内存组织

PIC24使用24位指令字（因此名称PIC24）。这意味着每个指令占用3字节，但是在闪存中，寻址是在32位块上，高字节（称为幻象字节）被忽略。



      以下为原文

    The PIC24 uses 24 bit instruction words (hence the name PIC24).
This means that each instruction occupies 3 bytes, but in the flash memory the addressing is on 32 bit chunks with the high byte (called phantom byte) being disregarded.

许多人对寄存器宽度和操作码宽度的不同有不同的理解，冯诺依曼体系结构非常普遍，哈佛的体系结构是一个谜。



      以下为原文

    Many people have problems understanding that the register width and the opcode width are different.
Von Neumann architecture is so prevalent that Harvard Architecture is a mystery to most.

PIC24闪存为24位宽。不能直接访问高阶字节。这两个低阶字节可以每个都需要一个地址。PIC24闪存地址空间为2／3RDS，大小为Flash字节。PIC24程序计数器总是偶数（0位实际上不存在），所以它总是指向24位闪存字的低字节。



      以下为原文

    PIC24 FLASH memory is 24 bits wide. The high order byte can not be accessed directly. The two low order bytes can  so each needs an address. PIC24 FLASH address space is 2/3rds the size of FLASH in bytes.
 
The PIC24 program counter is always even (the 0 bit doesn't actually exist) so it always points at the low byte of a 24 bit FLASH word.

 

每个PIC24指令为24位宽，表示为两个16位字，其中上部字的上字节是幻像字节。这些词中的每一个都有一个地址，即更低的字，偶数的地址和上面的单词，一个奇数的地址。你的PIC设备有用户的Flash程序存储器，地址0x000—0xAEFE和Flash配置字，地址0xAF00 -0xAFFE（0xAF00 -0xAF2C在你的上实现）。这是0xB000（或45056）字或90112字节。记住，这些字节中有1/4个是幻像字节。所以90112×3/4＝67584字节，大约为64千字节。



      以下为原文

    Each PIC24 instruction is 24-bit wide represented as two 16-bit words, where the upper byte of the upper word is a phantom byte. Each of these words get an address; i.e. lower word an even address and upper word an odd address.
 
Your PIC device has user flash program memory with addresses 0x0000-0xAEFE and flash config words with addresses 0xAF00-0xAFFE (0xAF00-0xAF2C are implemented on yours). This is 0xB000 (or 45056) words or 90112 bytes. Remember 1/4 of these bytes are phantom bytes. So 90112 * 3/4 = 67584 bytes which is approximately 64 Kbytes.

谢谢。我担心“近似”这个词会出现。在同一个数据表中，我看到128KB设备有704个写块，256kbDeVice有1376个写块。256是128x2，但1376不是704x2。所以我现在明白，根据Flash大小的地址计算不是线性A。我料想会是这样。



      以下为原文

   

Thanks.
I was afraid that the word "approximately" will appear.
In the same data sheet I see that the 128KB device has 704 write blocks and the 256KB device has 1376 write blocks.
256 is 128X2 but 1376 is not 704X2.
So I understand now that address calculations according to the flash size is not linear as I expected it to be.

每个PIC24指令是三字节宽。你不能均匀地把64KB、128KB和256KB分开三。



      以下为原文

   
Each PIC24 instruction is three bytes wide. You cannot divide 64KB, 128KB, and 256KB by three evenly.
 

这是错误的。闪存是字节可寻址的。偶数字节的低字节地址在奇数地址的中间字节，高字节没有地址，是不可访问的（低字节地址也用于访问整个24位字的指令和表操作）。唯一的“幻象”字节在设备的32位HEX文件中。



      以下为原文

   


That is wrong. The FLASH memory is byte addressable. The low byte at even addresses the middle byte at odd addresses and the high byte has no address and is not accessible (the low byte address is also used to accesses the whole 24 bit word for instructions and table operations). The only 'phantom' bytes are in 32 bit hex files for the devices.

 

来自PIC24家庭参考手册：



      以下为原文

   
From the PIC24 Family Reference Manual:
 

   Attached Image(s)

该手册是垃圾。最有意义的词可以直接访问为具有偶数地址的字，或者是具有偶数和奇数地址的单独字节。最重要的字只能通过表操作访问，使用整个24位字的偶数地址。



      以下为原文

    The manual is garbage.
The least significant word can be accessed directly as a word with even address or as separate bytes with even and odd addresses.
 
The most significant word can only be accessed via table operations using an even address for the whole 24bit word.
 

 

“萤火虫，”那是错的。闪存是字节可寻址的。低字节甚至在奇数地址的中间字节和高字节没有地址，是不可访问的“我想你可能会得到PSV模式与一般原则混淆。在使用PS/Flash访问模式的PSV中访问时，您所描述的是适用的。但是所有闪存都可以使用TBRRDL/H指令访问。这些指令允许访问完整的24位（加上幻像字节）。只有偶数地址才是有效的。一个具有奇数的地址实际上引用了前面的偶数地址。这是在手册中解释的。在24位（或32个幻像）中的高或Low Word是通过使用L或H后缀来选择的，并且只是为了使事情复杂化，后来的PIC24“味”用EDS使用标准指令完全访问所有24位。只需要选择正确的页面。这是最新的1024KB版本，一页接一页，一页一页！！！！希望这有助于Yorky



      以下为原文

    @flubydust,
'That is wrong. The FLASH memory is byte addressable. The low byte at even addresses the middle byte at odd addresses and the high byte has no address and is not accessible'
I think you may be getting PSV mode mixed up with general principles. What you have described are applicable when accessing in PSV using the RAM/FLASH access mode. But all Flash is accessible using the TBLRDL/H instructions. These instructions allow access to the full 24bits (plus phantom byte). Only the even addresses are valid. An address with an odd value actually references the previous even address. This is explained in the manual. The High or Low Word within the 24 bits (32 with phantom) is selected by using the L or H suffix.
AND just to complicate matters, the later PIC24 'flavours' with EDS give full access to all 24 bits using standard instructions. Just need to select the correct page. This goes for the latest 1024kB versions which have page after page after page !!!
Hope this assists.
T Yorky

一般原则是，一个24位宽的存储器每个24位字都有一个地址。程序计数器有一个有意义的比特0的唯一原因，我们正在对奇数和偶数地址进行拖动，以支持PSV窗口中的低阶16位的字节寻址。对我来说，使用标准指令对所有24位进行完全访问是个新闻。什么新的/更新的指令，当高阶词没有地址？



      以下为原文

   


The general principle is that a 24 bit wide memory has one address for each 24 bit word. The only reason the program counter has a notional bit 0 and we are drivelling on about odd and even addresses is to support byte addressing of the low order 16 bits in the PSV window.
 
Full access to all 24 bits using standard instructions is news to me. What new/updated instruction does that and how when the high order word doesn't have an address?

 

我理解你在地址上的观点，下位字的地址在偶数地址，下位字的高位字节在奇数地址，上面的字没有地址。不同的观点是从组织的角度写的手册，每个词都有一个词。按顺序排列地址。正如你所说的，每一个24位指令都有一个地址，即字在下位字上对齐（即位0总是0）。这里，位0不仅用来处理下位字的下位和上字节，还用于处理上字的下和上字节（即使这个上字节不存在——读返回0x00，写也没有影响）。换句话说，在字节模式位0中，确定上或下程序存储器字中的哪个字节被访问。



      以下为原文

   
I understand your point of view on the addressing, where the lower byte of the lower word at even address, the upper byte of the lower word at odd address, and the upper word has no address.
 
A different view is that of the manual written from an organization perspective, in that every word gets an "address" in sequential order. As you've said each 24-bit instruction has one address, that is word-aligned on the lower word (i.e. bit 0 is always 0). Here, bit 0 is used to address not only the lower and upper bytes of the lower word, but also the lower and upper bytes of the upper word (even though this upper byte does not exist -- read returns 0x00 and write has no effect). In other words, in Byte mode bit 0 determines which byte in the upper or lower program memory word is accessed.
 

因此，我阅读了GA6/GB6系列数据表，看到增强是使用页面寄存器的最高有效位来选择程序存储器的哪个字映射到PSV空间。每次需要在读取前两个字节和第三个字节之间切换时，必须更改页面寄存器。比特0不存在。有效地，它们使程序内存地址空间增加了一倍，上半部分充满了高阶和幻像字节。



      以下为原文

   


So I read the GA6/GB6 series datasheet and see the enhancement is using the most significant bit of the page register to select which word of program memory is mapped into PSV space. Kinda useless having to change the page register every time you need to switch between reading the first two bytes and 3rd byte. Bit 0 doesn't come into it. Effectively they have doubled the program memory address space and the top half is full of high order and phantom bytes.

 

地址是16位，只是每个16位地址保持24位。表RD/WR高访问位23∶16。



      以下为原文

    The addresses are 16 bit, it's just that each 16bit address holds 24 bits.
 
table rd/wr high accesses bits 23:16
 
;----------------------------------------------------
KeyWords:
.pascii "PS",<0>        ;serial prescaler
.pascii "T",<0>,<0>  ;wait time between operations and E time
.pascii "SPI"              ;serial module 1-4
.pascii "SER"             ;serial module 1-4
.pascii "SDO"            ;serial date out
.pascii "SCK"             ;serial clock
.pascii "CS",<0>       ;chip select
.pascii "RS",<0>       ;register select
.pascii "RW",<0>      ;not read/write
.pascii "E",<0>,<0> ;enable trigger
.pascii "BUS"            ;4/8bit bus
.pascii <0>
;----------------------------------------------------
 
;----------------------------------------------------
.equ table,        w1
.equ lowword,        w2
.equ highword,        w3
.equ tmp,        w4
.equ setptr,        w5
.equ STRING,        w6    ;global
.equ index,        w7

_parser:
    mov        STRING,LineBuffer_src+VAR_CPYSTRING
    mov        #tblpage(KeyWords),tmp
    mov        tmp,TBLPAG
    mov        #tbloffset(KeyWords),table
    clr        highword                ;4th
    ;~~~~~~~~~~~~~~~~~~~~~~~~~~~
looptbl:
    mov        #WREG2,setptr
    tblrdh.b [table],tmp        ;3rd
    tblrdl.b [table++],[setptr++]   ;1st
    tblrdl.b [table++],[setptr++]   ;2nd
    mov.b   tmp,[setptr++]        ;3rd
    ;~~~~~~~~~~~~~~~~~~~~~~~~~~~
    cp0.b   lowword
    bra        z,notfoundname
    mov        #WREG2,setptr
    ;~~~~~~~~~~~~~~~~~~~~~~~~~~~
loopname:
    mov.b   [setptr],tmp
    cp0.b   tmp
    bra        z,checkterm
    cp.b    tmp,[STRING]
    bra        nz,nexttable
    ;~~~~~~~~~~~~~~~~~~~~~~~~~~~
    inc        STRING,STRING
    inc        setptr,setptr
    bra        loopname
    ;~~~~~~~~~~~~~~~~~~~~~~~~~~~
nexttable:
    mov        LineBuffer_src+VAR_CPYSTRING,STRING
    bra        looptbl
    ;~~~~~~~~~~~~~~~~~~~~~~~~~~~
    etc...