地址不连续呀!为什么呢?谢谢!
.C文件
#include "stdio.h"
int a;
#pragma DATA_SECTION(x1, "x_data")
#pragma DATA_SECTION(x2, "x_data")
#pragma DATA_SECTION(x3, "x_data")
#pragma DATA_SECTION(x4, "x_data")
#pragma DATA_SECTION(x5, "x_data")
#pragma DATA_SECTION(x6, "x_data")
#pragma DATA_SECTION(x7, "x_data")
#pragma DATA_SECTION(x8, "x_data")
#pragma DATA_SECTION(x9, "x_data")
#pragma DATA_SECTION(x10, "x_data")
int short unsigned x1;
int short unsigned x2;
int short unsigned x3;
int short unsigned x4;
int short unsigned x5;
int short unsigned x6;
int short unsigned x7;
int short unsigned x8;
int short unsigned x9;
int short unsigned x10;
int main(void)
[
x1=1;
x2=2;
x3=3;
x4=4;
x5=5;
x6=6;
x7=7;
x8=8;
x9=9;
x10=10;
a=0;
while(1)
[
a=a+1;
if (a==100000)
[
a=0;
]
]
]
.cmd文件
/****************************************************************************/
/* C6748.cmd */
/* Copyright (c) 2010 Texas Instruments Incorporated */
/* Author: Rafael de Souza */
/* */
/* Description: This file is a sample linker command file that can be */
/* used for linking programs built with the C compiler and */
/* running the resulting .out file on a C6748 */
/* device. Use it as a guideline. You will want to */
/* change the memory layout to match your specific C6xxx */
/* target system. You may want to change the allocation */
/* scheme according to the size of your program. */
/* */
/****************************************************************************/
-l rts67plus.lib
/*-l ......bsllibevmomapl138_bsl.lib*/
-stack 0x00000800
-heap 0x00000800
MEMORY
[
vecs: ORIGIN = 0xFFF00000 LENGTH = 0x00080000
dsp_l1_p_ram: ORIGIN = 0x11E00000 LENGTH = 0x00008000 //32K
dsp_l1_d_ram: ORIGIN = 0x11F00000 LENGTH = 0x00008000 //32K
dsp_l2_ram: ORIGIN = 0x11800000 LENGTH = 0x00040000 //256K
shared_ram: ORIGIN = 0x80000000 LENGTH = 0x00020000
ddr_ram1: ORIGIN = 0xC0000000 LENGTH = 0x08000000 //256KByte
//AEMIF: ORIGIN=0x60000000 LENGTH =0x06000000 /* AEMIF*/
B0: ORIGIN=0x60000000 LENGTH =0x01000000 /* AEMIF CS2 region */
B1: ORIGIN=0x61000000 LENGTH =0x01000000 /* AEMIF CS2 region */
AEMIF_CS3: ORIGIN=0x62000000 LENGTH =0x02000000 /* AEMIF CS3 region */
AEMIF_CS4: ORIGIN=0x64000000 LENGTH =0x02000000 /* AEMIF CS4 region */
//ddr_ram2: ORIGIN = 0xC0040000 LENGTH = 0x00040000 //256KByte
//ddr_ram3: ORIGIN = 0xC0080000 LENGTH = 0x00040000 //256KByte
//ddr_ram4: ORIGIN = 0xC00C0000 LENGTH = 0x00040000 //256KByte
//ddr_ram5: ORIGIN = 0xC0100000 LENGTH = 0x00040000 //256KByte
//ddr_ram6: ORIGIN = 0xC0140000 LENGTH = 0x00040000 //256KByte
//ddr_ram7: ORIGIN = 0xC0180000 LENGTH = 0x00040000 //256KByte
//ddr_ram8: ORIGIN = 0xC01C0000 LENGTH = 0x00040000 //256KByte
//ddr_ram9: ORIGIN = 0xC0200000 LENGTH = 0x00040000 //256KByte
//ddr_ram2: ORIGIN = 0xC2000000 LENGTH = 0x02000000 //32MByte
//ddr_ram3: ORIGIN = 0xC4000000 LENGTH = 0x02000000 //32MByte
//ddr_ram4: ORIGIN = 0xC6000000 LENGTH = 0x02000000 //32MByte
]
SECTIONS
[
.vectors > dsp_l2_ram
.text > dsp_l2_ram
.const > dsp_l2_ram
.bss > dsp_l2_ram
.far > dsp_l2_ram
.switch > dsp_l2_ram
.stack > dsp_l2_ram
.data > dsp_l2_ram
.cinit > dsp_l2_ram
.sysmem > dsp_l2_ram
.cio > dsp_l2_ram
x_data > B0
/*
.vectors > shared_ram
.text > shared_ram //shared_ram
.const > shared_ram
.bss > shared_ram
.far > shared_ram
.switch > shared_ram
.stack > shared_ram
.data > shared_ram
.cinit > shared_ram
.sysmem > shared_ram
.cio > shared_ram
*/
.smpbuf > ddr_ram1 //DDR2 ram space 1/
.kgbuf > ddr_ram1 //DDR2 ram space 4
.dcbuf > ddr_ram1 //DDR2 ram space 5
.resendbuf > ddr_ram1 //resend the packet buffer 3200 1s data
.progbuf > shared_ram
//.cache1 > dsp_l1_d_ram
//.cache2 > dsp_l2_ram
// .progbuf > dsp_l2_ram
// .vectors > vecs //vector
]