| NVIDIA is now looking for Soc Verification Engineer. If you are interested in it, pls feel free to contact me. Sarah Su(HR) E-mai: sasu@nvidia.com My QQ: 524786472 MSN: suwei198702@hotmail.com Position Title: ASIC Design/Verification Engineer Job Description/Qualifications: RESPONSIBILITIES: - RTL design, verification, synthesis for various low power control logic in GPU chips. - Develop and maintain verification environment at both full chip & unit level - Code/functional coverage analysis - Responsible for running both RTL & gate level simulation - Develop testing and regression methodologies - Develop/maintain/enhance environment tools/scripts/makefiles MINIMUM REQUIREMENTS: - BSEE/MSEE/BSCS/MSCS with 3+/5+ years of experience in ASIC design or verification - Proficient in Verilog HDL - Familiar with logic simulators and debug tools (VCS, NCSIM, Verdi and etc.) - Working knowledge in C/C++, Makefile - Must have strong programming skills in one or more scripting languages: TCL, Perl, Python - Knowledge in one of the below areas is a big plus + Display related project experience + UVM/VMM experience + Low power design/verification experience (Multi-Voltage, power gating, + UPF/APF and etc.) ARM based SoC verification experience AHB/AXI + architecture Embedded OS Position Title: Multi-Media Design/Verification Engineer Job Description/Qualifications: Responsibilities - Define Test plans for multi-media hardware engines at system level - Develop and maintain verification environment. - Code/functional coverage analysis - Responsible for running both RTL & gate level simulation - Develop testing and regression methodologies - Develop/maintain/enhance environment tools/scripts/makefiles - Develop/maintain/enhance testing driver for engines. MINIMUM REQUIREMENTS: - BSEE/MSEE/BSCS/MSCS with 3+/5+ years of experience in ASIC design or verification - Proficient in Verilog HDL - Familiar with logic simulators and debug tools (VCS, NCSIM, Verdi and etc.) - Working knowledge in C/C++, Makefile - Must have strong programming skills in one or more scripting languages: TCL, Perl, Python - Hands-on experience on at least one of following fields + Audio I/O interface and audio decoding Camera interface (CSI) and + image processing Video decoding/encoding and video processing Position Title: Verification/Infrastructure Engineer Job Description/Qualifications: Position Summary: Verification Engineer for SOC/IP, being responsible for front-end verification methodology, test bench and infrastructure. RESPONSIBILITIES: - Participate in the research of verification ,methodology to improve automation and productivity to produce Nvidia new high-quality cutting-edge products - Deploy the advanced verification methodology and infrastructure of the SOC/IP - Interface with the global IP teams and Central Verification groups. - Technical support REQUIREMENTS: - BSEE/MSEE/BSCS/MSCS with 3+ years of experience in ASIC verification. - Needs to have better understanding of Verification methodology and concepts - Should be versatile in any one of the high level verification flow such as SV,VMM,VERA,OVM, UVM etc as well as knowledge of industry standard tools for verification - Familiar with at least one simulator and debug tools (VCS, NCSIM, Verdi and etc.) - Working knowledge in C/C++, Makefile - At least good at one of the script programing lanange : Perl, Shell, Ruby, Python, etc - Familiar with Linux Environment - Design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.) is a plus - Strong problem solving skills Best Regards, Sarah Su APAC Staffing Team NVIDIA SHANGHAI Building 9,No. 399, Keyuan Road, Zhangjiang Innovation Park, Shanghai, China Tel +(86 21) 61041139 E-mai: sasu@nvidia.com MSN: suwei198702@hotmail.com |
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