请问Spartan6对同一银行的BUFPLL和MCB的限制是什么？

对此设计进行故障排除有很多可能性在您将此问题排除在逻辑结论之前，您没有引脚排列，电路板布局或产品设计。
建议：
1.当您在寻找解决方案的墙上敲打头时，打开一个Web箱以获得Xilinx的直接支持。
2.在调试方面，不要停止。
来自UG382的这篇文章可能提供一个线索：
BUFPLL_MCB在同一个库中包含两个BUFPLL。
因此，BUFPLL_MCB和BUFPLL不能同时使用。
您是否可以灵活地将差分串行输入移至偶数（非MCB）IO组之一？
（不要忘记更新.UCF约束，包括IOSTANDARD）。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
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在原帖中查看解决方案



以下为原文

There are a large number of possibilities for troubleshooting this design  Until you troubleshoot this problem to its logical conclusion, you don't have a pinout, a circuit board layout, or a product design.
 
Suggestions:
 
1.  While you are beating your heads against a wall searching for the solution, open a webcase for direct Xilinx support.
2.  On the debugging side, don't stop.
 
This text from UG382 may provide a clue:
The BUFPLL_MCB contains two BUFPLLs within the same bank. As a result, the BUFPLL_MCB and BUFPLL cannot be used at the same time.
 
Do you have the flexibility to move the differential serial inputs to one of the even-numbered (non-MCB) IO banks? (don't forget to update the .UCF constraints, including IOSTANDARD).
 
-- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.View solution in original post

“LVDS”输入由于与DDR2内存控制器共享相同的IO库，因此可能仅限于1.8V差分IO标准之一。
见DS162，表8。
我可能错了，因为你只使用输入。
值得一试。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

The "LVDS" inputs, because they share the same IO bank as the DDR2 memory controller, may be limited to one of the 1.8V differential IO standards.  See DS162, Table 8.
 
I may be wrong on this, as you are using input only.  It's worth checking.
 
-- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

莫因，
听起来很有希望;
我刚刚将.ucf文件中的IOSTANDARD从LVDS_33更改为DIFF_SSTL18_II，这与用于DDR2差分信号的相同。
但错误保持不变。
还有DIFF_SSTL_18_I，DIFF_HSTL_II，LVDS_25  - 所以我假设，它不是IO标准的问题，但是某种程度上与我用于810MHz的PLL和MCB PLL或它们的缓冲器之间的难以实现有关。
但这只是基于我缺乏知识的一些猜测。
干杯，
WK



以下为原文

Moin,

Sounds promising; i just changed the IOSTANDARD in the .ucf file from LVDS_33 to DIFF_SSTL18_II, which is the same, as is used for the DDR2 differential signals. But the error keeps being the same. Also with DIFF_SSTL_18_I, DIFF_HSTL_II, LVDS_25 - so i assume, it's not a problem of the IO standard but somehow related to difficulites between the PLL i use for the 810MHz and the MCB PLL or their buffers. But this is just some guessing based on my lack of knowledge.

Cheers,

WK

WK和Moin，
有可能存在多个问题。
建议你删除4个输入差分对的.UCF引脚分配，让ISE自动分配封装引脚。
同时保持WK对IOSTANDARD的更改。
然后看看地点和路线会发生什么。
Bonne机会！
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

WK and Moin,
 
It is possible that there are multiple problems.
 
Suggest you remove the .UCF pin assignments for the 4 input diff pairs, and let ISE auto-assign the package pins.  Also keep the IOSTANDARD change made by WK.  Then see what happens with place and route.
 
Bonne chances!
 
-- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.