在V6中使用IODELAYE1的IOBUFDS收到错误

你好，
我正在尝试在XC6VLX240T中将IOBUFBS与双向IODELAYE1和IDDR以及ODDR一起用于特殊的DDR3应用程序。
当我按照Virtex-6选择IO用户指南中所述连接四个基元时，我从map（ISE12.2）中收到错误：
---
错误：打包：2531  - 双数据速率寄存器“ddr3_controller_inst / G_lane [0] .ODDR_dqs_t”无法根据需要加入“OLOGICE1”组件。
寄存器符号ddr3_controller_inst / G_lane [0] .ODDR_dqs_t的输出信号需要一般路由到结构，但寄存器只能路由到ILOGIC，IODELAY和IOB。
---
如果我使用（单端）IOBUF而不是IOBUFDS一切正常。
我还尝试了生成相同连接的Select IO Generator，因此map生成了相同的错误。
这是我的代码：
---
ODDR_dqs_o：ODDR通用映射（DDR_CLK_EDGE =>“SAME_EDGE”，INIT =>'0'，SRTYPE =>“SYNC”）端口映射（Q => dqs_o，C => clk_400，CE =>'1'，D1 =>
dqs_o_a，D2 => dqs_o_b，R =>'0'，S =>'0'）;
------------------------------- ODDR_dqs_t：ODDR通用地图（DDR_CLK_EDGE =>“SAME_EDGE”，INIT =>'0'
，SRTYPE =>“SYNC”）端口映射（Q => dqs_t，C => clk_400，CE =>'1'，D1 => dqs_t_a，D2 => dqs_t_b，R =>'0'，S =>'0
'）;
------------------------------- IODELAYE1_dqs：IODELAYE1通用地图（CINVCTRL_SEL => FALSE，DELAY_src =>“IO”，HIGH_PERFORMANCE_MODE
=> TRUE，IDELAY_TYPE =>“VAR_LOADABLE”，IDELAY_VALUE => 0，ODELAY_TYPE =>“VAR_LOADABLE”，ODELAY_VALUE => 0，REFCLK_FREQUENCY => 200.0，SIGNAL_PATTERN =>“DATA”）端口映射（CNTVALUEOUT =>打开，DATAOUT =
> dqs_i，C => clk_400，CE =>'0'，CINVCTRL =>'0'，CLKIN =>'Z'，CNTVALUEIN => dqs_lane，DATAIN =>'Z'，IDATAIN => dqs_x，INC =>'
0'，ODATAIN => dqs_o，RST => dqs_lane_wr，T => dqs_t（l））;
------------------------------- IOBUFDS_dqs：IOBUFDS端口映射（O => dqs_x，IO => ddr_dqsp，IOB =>
ddr_dqsn，I => dqs_i，T => dqs_t）;
---
有谁知道如何让事情发挥作用？
问候，
迈克尔



以下为原文

Hello,

I'm trying to use an IOBUFBS together with bidirectional IODELAYE1 and IDDR und ODDR in a XC6VLX240T for a special DDR3 application.
When I connected the four primitives as described in the Virtex-6 Select IO User Guide I get an error from map (ISE12.2):
---
ERROR:Pack:2531 - The dual data rate register
   "ddr3_controller_inst/G_lane[0].ODDR_dqs_t" failed to join the "OLOGICE1"
   component as required.  The output signal for register symbol
   ddr3_controller_inst/G_lane[0].ODDR_dqs_t requires general routing to fabric,
   but the register can only be routed to ILOGIC, IODELAY, and IOB.
---
If I use a (single ended) IOBUF instead of the IOBUFDS everything works fine. I also tried the Select IO Generator which produced the same connections and thus the same error is produces by map. Here my code:
---
    ODDR_dqs_o: ODDR
    generic map(
        DDR_CLK_EDGE => "SAME_EDGE",
        INIT => '0',
        SRTYPE => "SYNC"
    )
    port map (
        Q => dqs_o,
        C => clk_400,
        CE => '1',
        D1 => dqs_o_a,
        D2 => dqs_o_b,
        R => '0',
        S => '0'
    );
    -------------------------------
    ODDR_dqs_t: ODDR
    generic map(
        DDR_CLK_EDGE => "SAME_EDGE",
        INIT => '0',
        SRTYPE => "SYNC"
    )
    port map (
        Q => dqs_t,
        C => clk_400,
        CE => '1',
        D1 => dqs_t_a,
        D2 => dqs_t_b,
        R => '0',
        S => '0'
    );
    -------------------------------
    IODELAYE1_dqs: IODELAYE1
    generic map (
        CINVCTRL_SEL => FALSE,
        DELAY_src=> "IO",
        HIGH_PERFORMANCE_MODE => TRUE,
        IDELAY_TYPE => "VAR_LOADABLE",
        IDELAY_VALUE => 0,
        ODELAY_TYPE => "VAR_LOADABLE",
        ODELAY_VALUE => 0,
        REFCLK_FREQUENCY => 200.0,
        SIGNAL_PATTERN => "DATA"
    )
    port map (
        CNTVALUEOUT => open,
        DATAOUT => dqs_i,
        C => clk_400,
        CE => '0',
        CINVCTRL => '0',
        CLKIN => 'Z',
        CNTVALUEIN => dqs_lane,
        DATAIN => 'Z',
        IDATAIN => dqs_x,
        INC => '0',
        ODATAIN => dqs_o,
        RST => dqs_lane_wr,
        T => dqs_t(l)
    );
    -------------------------------
   IOBUFDS_dqs: IOBUFDS
   port map (
      O => dqs_x,
        IO => ddr_dqsp,
        IOB => ddr_dqsn,
        I => dqs_i,
        T => dqs_t
   );
---
Has anyone an idea how I get things to work?

Regards,
Michael