S，
比较数据表中的内容，例如：
http://www.xilinx.com/support/documentation/data_sheets/ds182_Kintex_7_Data_Sheet.pdf
同
http://www.xilinx.com/support/documentation/data_sheets/ds152.pdf
例如。
对于HSTL-I，K7中的TioPI为0.56ns，而对于V6，则为1.06ns。
....
其他数字同样更快。
你的pcb与你的外围设备有多快？
使用IBIS模拟找出答案。
7系列IBIS还没有出来。
从您的Xilinx FAE询问它们。
底线：以1.8伏特供电的7系列IO非常快......因为它们是针对速度优化的1.8伏晶体管器件。
必须去较低的Vcco，并使用更快的晶体管来获得这个速度，并放弃3.3v IO。
在A7或K7中的某些银行仍然存在的3.3v IO运行速度较慢（就像他们在支持3v IO的系列中所做的那样）。
Austin Lesea主要工程师Xilinx San Jose
以上来自于谷歌翻译
以下为原文
s,
compare what you can that is in the datasheet, for example:
http://www.xilinx.com/support/documentation/data_sheets/ds182_Kintex_7_Data_Sheet.pdf
with
http://www.xilinx.com/support/documentation/data_sheets/ds152.pdf
for example.
TioPI in K7 is 0.56 ns for HSTL-I, and in V6, it is 1.06ns.
....
Other numbers are similarly faster.
How fast on your pcb with your peripherals? Use IBIS simulations to find out. Series 7 IBIS are not out yet. Inquire about them from your Xilinx FAE.
Bottom line: the IO on series 7 powered at 1.8 volts are very fast...because they are 1.8 volt transistor devices optimized for speed. Have to go to the lower Vcco, and use the faster transistors to get this speed, and give up 3.3v IO. The 3.3v IO that is still there on some banks in A7 or K7 run slower (like they did in families that supported 3v IO).
Austin Lesea
Principal Engineer
Xilinx San Jose
S，
比较数据表中的内容，例如：
http://www.xilinx.com/support/documentation/data_sheets/ds182_Kintex_7_Data_Sheet.pdf
同
http://www.xilinx.com/support/documentation/data_sheets/ds152.pdf
例如。
对于HSTL-I，K7中的TioPI为0.56ns，而对于V6，则为1.06ns。
....
其他数字同样更快。
你的pcb与你的外围设备有多快？
使用IBIS模拟找出答案。
7系列IBIS还没有出来。
从您的Xilinx FAE询问它们。
底线：以1.8伏特供电的7系列IO非常快......因为它们是针对速度优化的1.8伏晶体管器件。
必须去较低的Vcco，并使用更快的晶体管来获得这个速度，并放弃3.3v IO。
在A7或K7中的某些银行仍然存在的3.3v IO运行速度较慢（就像他们在支持3v IO的系列中所做的那样）。
Austin Lesea主要工程师Xilinx San Jose
以上来自于谷歌翻译
以下为原文
s,
compare what you can that is in the datasheet, for example:
http://www.xilinx.com/support/documentation/data_sheets/ds182_Kintex_7_Data_Sheet.pdf
with
http://www.xilinx.com/support/documentation/data_sheets/ds152.pdf
for example.
TioPI in K7 is 0.56 ns for HSTL-I, and in V6, it is 1.06ns.
....
Other numbers are similarly faster.
How fast on your pcb with your peripherals? Use IBIS simulations to find out. Series 7 IBIS are not out yet. Inquire about them from your Xilinx FAE.
Bottom line: the IO on series 7 powered at 1.8 volts are very fast...because they are 1.8 volt transistor devices optimized for speed. Have to go to the lower Vcco, and use the faster transistors to get this speed, and give up 3.3v IO. The 3.3v IO that is still there on some banks in A7 or K7 run slower (like they did in families that supported 3v IO).
Austin Lesea
Principal Engineer
Xilinx San Jose
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