【小e物联网试用体验】开发板初步试用(完结-4)

ti

5.2.2将SDK目录中的examples/driver_lib/driver/uart.c拷贝到iot_app/driver子目录

#include "esp_common.h"

#include "freertos/FreeRTOS.h"

#include "freertos/task.h"

#include "freertos/queue.h"

#include "driver/uart.h"

enum {

UART_EVENT_RX_CHAR,

UART_EVENT_MAX

};

typedef struct _os_event_ {

uint32 event;

uint32 param;

} os_event_t;

xTaskHandle xUartTaskHandle;

xQueueHandle xQueueUart;

LOCAL STATUS uart_tx_one_char(uint8 uart, uint8 TxChar)

{

while (true) {

uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S);

if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {

break;

}

WRITE_PERI_REG(UART_FIFO(uart) , TxChar);

return OK;

}

LOCAL void uart1_write_char(char c)

{

if (c == 'n') {

uart_tx_one_char(UART1, 'r');

uart_tx_one_char(UART1, 'n');

} else if (c == 'r') {

} else {

uart_tx_one_char(UART1, c);

}

LOCAL void uart0_write_char(char c)

{

if (c == 'n') {

uart_tx_one_char(UART0, 'r');

uart_tx_one_char(UART0, 'n');

} else if (c == 'r') {

} else {

uart_tx_one_char(UART0, c);

}

LOCAL void uart_rx_intr_handler_ssc(void)

{

/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents

* uart1 and uart0 respectively

*/

os_event_t e;

portBASE_TYPE xHigherPriorityTaskWoken;

uint8 RcvChar;

uint8 uart_no = 0;

if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {

return;

}

RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF;

WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);

e.event = UART_EVENT_RX_CHAR;

e.param = RcvChar;

xQueueSendFromISR(xQueueUart, (void *)&e, &xHigherPriorityTaskWoken);

portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);

}

LOCAL void uart_task(void *pvParameters)

{

os_event_t e;

for (;;) {

if (xQueueReceive(xQueueUart, (void *)&e, (portTickType)portMAX_DELAY)) {

switch (e.event) {

case UART_EVENT_RX_CHAR:

printf("%c", e.param);

break;

default:

break;

}

vTaskDelete(NULL);

}

//=================================================================

void UART_SetWordLength(UART_Port uart_no, UART_WordLength len)

{

SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_BIT_NUM, len, UART_BIT_NUM_S);

}

void UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num)

{

SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_STOP_BIT_NUM, bit_num, UART_STOP_BIT_NUM_S);

}

void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask)

{

CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_LINE_INV_MASK);

SET_PERI_REG_MASK(UART_CONF0(uart_no), inverse_mask);

}

void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode)

{

CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_PARITY | UART_PARITY_EN);

if (Parity_mode == USART_Parity_None) {

} else {

SET_PERI_REG_MASK(UART_CONF0(uart_no), Parity_mode | UART_PARITY_EN);

}

void UART_SetBaudrate(UART_Port uart_no, uint32 baud_rate)

{

uart_div_modify(uart_no, UART_CLK_FREQ / baud_rate);

}

//only when USART_HardwareFlowControl_RTS is set , will the rx_thresh value be set.

void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8 rx_thresh)

{

if (flow_ctrl & USART_HardwareFlowControl_RTS) {

PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);

SET_PERI_REG_BITS(UART_CONF1(uart_no), UART_RX_FLOW_THRHD, rx_thresh, UART_RX_FLOW_THRHD_S);

SET_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN);

} else {

CLEAR_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN);

}

if (flow_ctrl & USART_HardwareFlowControl_CTS) {

PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_UART0_CTS);

SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN);

} else {

CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN);

}

void UART_WaitTxFifoEmpty(UART_Port uart_no) //do not use if tx flow control enabled

{

while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S));

}

void UART_ResetFifo(UART_Port uart_no)

{

SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);

CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);

}

void UART_ClearIntrStatus(UART_Port uart_no, uint32 clr_mask)

{

WRITE_PERI_REG(UART_INT_CLR(uart_no), clr_mask);

}

void UART_SetIntrEna(UART_Port uart_no, uint32 ena_mask)

{

SET_PERI_REG_MASK(UART_INT_ENA(uart_no), ena_mask);

}

void UART_intr_handler_register(void *fn, void *arg)

{

_xt_isr_attach(ETS_UART_INUM, fn, arg);

}

void UART_SetPrintPort(UART_Port uart_no)

{

if (uart_no == 1) {

os_install_putc1(uart1_write_char);

} else {

os_install_putc1(uart0_write_char);

}

void UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef *pUARTConfig)

{

if (uart_no == UART1) {

PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);

} else {

PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);

PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);

PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);

}

UART_SetFlowCtrl(uart_no, pUARTConfig->flow_ctrl, pUARTConfig->UART_RxFlowThresh);

UART_SetBaudrate(uart_no, pUARTConfig->baud_rate);

WRITE_PERI_REG(UART_CONF0(uart_no),

((pUARTConfig->parity == USART_Parity_None) ? 0x0 : (UART_PARITY_EN | pUARTConfig->parity))

| (pUARTConfig->stop_bits << UART_STOP_BIT_NUM_S)

| (pUARTConfig->data_bits << UART_BIT_NUM_S)

| ((pUARTConfig->flow_ctrl & USART_HardwareFlowControl_CTS) ? UART_TX_FLOW_EN : 0x0)

| pUARTConfig->UART_InverseMask);

UART_ResetFifo(uart_no);

}

void UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef *pUARTIntrConf)

{

......

}

LOCAL void uart0_rx_intr_handler(void *para)

{

/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents

* uart1 and uart0 respectively

*/

uint8 RcvChar;

uint8 uart_no = UART0;//UartDev.buff_uart_no;

uint8 fifo_len = 0;

uint8 buf_idx = 0;

uint8 fifo_tmp[128] = {0};

uint32 uart_intr_status = READ_PERI_REG(UART_INT_ST(uart_no)) ;

while (uart_intr_status != 0x0) {

if (UART_FRM_ERR_INT_ST == (uart_intr_status & UART_FRM_ERR_INT_ST)) {

//printf("FRM_ERRrn");

WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);

} else if (UART_RXFIFO_FULL_INT_ST == (uart_intr_status & UART_RXFIFO_FULL_INT_ST)) {

printf("fullrn");

fifo_len = (READ_PERI_REG(UART_STATUS(UART0)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;

buf_idx = 0;

while (buf_idx < fifo_len) {

uart_tx_one_char(UART0, READ_PERI_REG(UART_FIFO(UART0)) & 0xFF);

buf_idx++;

}

WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);

} else if (UART_RXFIFO_TOUT_INT_ST == (uart_intr_status & UART_RXFIFO_TOUT_INT_ST)) {

printf("toutrn");

fifo_len = (READ_PERI_REG(UART_STATUS(UART0)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;

buf_idx = 0;

while (buf_idx < fifo_len) {

uart_tx_one_char(UART0, READ_PERI_REG(UART_FIFO(UART0)) & 0xFF);

buf_idx++;

}

WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR);

} else if (UART_TXFIFO_EMPTY_INT_ST == (uart_intr_status & UART_TXFIFO_EMPTY_INT_ST)) {

printf("emptynr");

WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_TXFIFO_EMPTY_INT_CLR);

CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA);

} else {

//skip

}

uart_intr_status = READ_PERI_REG(UART_INT_ST(uart_no)) ;

}

void uart_init_new(void)

{

UART_WaitTxFifoEmpty(UART0);

UART_WaitTxFifoEmpty(UART1);

UART_ConfigTypeDef uart_config;

uart_config.baud_rate = BIT_RATE_74880;

uart_config.data_bits = UART_WordLength_8b;

uart_config.parity = USART_Parity_None;

uart_config.stop_bits = USART_StopBits_1;

uart_config.flow_ctrl = USART_HardwareFlowControl_None;

uart_config.UART_RxFlowThresh = 120;

uart_config.UART_InverseMask = UART_None_Inverse;

UART_ParamConfig(UART0, &uart_config);

UART_IntrConfTypeDef uart_intr;

uart_intr.UART_IntrEnMask = UART_RXFIFO_TOUT_INT_ENA | UART_FRM_ERR_INT_ENA | UART_RXFIFO_FULL_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA;

uart_intr.UART_RX_FifoFullIntrThresh = 10;

uart_intr.UART_RX_TimeOutIntrThresh = 2;

uart_intr.UART_TX_FifoEmptyIntrThresh = 20;

UART_IntrConfig(UART0, &uart_intr);

UART_SetPrintPort(UART0);

UART_intr_handler_register(uart0_rx_intr_handler,NULL);

ETS_UART_INTR_ENABLE();

/*

UART_SetWordLength(UART0,UART_WordLength_8b);

UART_SetStopBits(UART0,USART_StopBits_1);

UART_SetParity(UART0,USART_Parity_None);

UART_SetBaudrate(UART0,74880);

UART_SetFlowCtrl(UART0,USART_HardwareFlowControl_None,0);

*/

}

定义UART事件类型：

接收到字符事件

定义事件：

事件类型

事件参数

UART任务处理句柄

UART事件队列

向UART发送字符函数

取UART状态寄存器中的传输FIFO数(bit23:16)

UART_TXFIFO_CNT=0xff,UART_TXFIFO_CNT_S=16

如果传输FIFO数目小于126，即可进行发送；否则需要等待

发送字符

UART1写入字符函数(可以是回车换行符)

UART0写入字符函数(可以是回车换行符)

UART接收中断处理函数

UART0和UART1的接收中断处理函数都是本函数，中断出现时通过寄存器0x3ff20020的bi2(UART1)和bit0(UART0)分别表示。

在include/freertos/portmacro.h中定义：

#define portBASE_TYPE long

先检查UART中断状态寄存器的接收FIFO满中断标志是否置位，如果置位则接收FIFO满中断产生，这里不进行处理

读取接收FIFO中的字符

清除UART清除中断寄存器中的接收FIFO满中断清除标志位

设置事件类型

设置事件参数(从FIFO中取得的字符)

将事件发送到UART事件队列

激活任务调度。分析如下：

在include/freertos/portmacro.h中定义：

#define portEND_SWITCHING_ISR( xSwitchRequired )

{

extern void vTaskSwitchContext( void );

if( xSwitchRequired )

{

vTaskSwitchContext();

}

FreeRTOS系统的心跳就是系统节拍器（时钟）。FreeRTOS配置这个系统生成一个定期的节拍（时钟）中断。用户可以配置的节拍中断频率，通常是在毫秒范围。vTaskSwitchContext()函数在每次的节拍中断释放的时候被调用。vTaskSwitchContext()选择优先级最高的就绪任务并将它赋予pxCurrentTCB变量，当vTaskSwitchContext()返回硬件相关代码时开始运行那个任务。

UART任务

从xQueueUart事件队列中接收事件

针对具体事件UART_EVENT_RX_CHAR进行相应的处理：输出参数，即接收的字符

设置数据位长度函数

设置停止位函数

设置反相屏蔽码函数

设置奇偶校验位函数

设置波特率函数

设置硬件流控函数

等待发送FIFO空

重置FIFO

清除中断寄存器状态

设置中断使能

注册中断处理句柄fn

设置打印信息的UART端口

UART端口参数配置函数

UART中断配置函数

UART0接收中断处理函数

UART0和UART1的接收中断处理函数都是本函数，中断出现时通过寄存器0x3ff20020的bi2(UART1)和bit0(UART0)分别表示。

获取中断状态寄存器内容

rx byte start error

RX fifo full event(接收fifo缓存区满)

取UART状态寄存器的最低8位(bit[7:0] 表示uart接收fifo中的字符数)

UART_RXFIFO_CNT_S=0,UART_RXFIFO_CNT=0XFF

将接收fifo之中的数据取出来后再发送回去

清除接收FIFO满中断

Rx time-out event(接收fifo缓存区超时)

获取接收fifo中的数据长度

将接收fifo之中的数据取出来后再发送回去

清除超时中断

TX fifo empty(发送fifo缓存区空)

清除中断

设置中断

获取中断状态寄存器内容，循环处理直到中断状态寄存器内容为全0(无任何错误和事务需要处理)

UART初始化函数

关于FIFO: UART0和UART1各有⼀个⻓度为128Byte的硬件FIFO，读写FIFO都在同⼀个地址操作。两个UART模块的硬件寄存器相同，通过UART0/UART1的宏定义来区分。

5.2.3在Iot_app/user/user_main.c中调用UART初始化函数

......

#include "driver/uart.h"

......

void user_init(void)

{

......

uart_init_new();

......

}

6 wifi模块与应用服务器的通信

6.1 wifi模块与应用服务器之间的通信方式选择和实现模式

6.1.1协议选择

wifi模块配网成功后，即可与公网的应用服务器进行通信。根据应用的具体情况，可以选择TCP或者UDP协议。这里选择TCP协议。

6.1.2实现模式

根据espressif提供的资料，可以通过如下两种方式实现wifi模块与应用服务器之间的通信：

A.直接采用socket编程实现。样例参考官方文档《20A-ESP8266__RTOS_SDK__Programming_Guide__CN_v1.3.0_20160321.pdf》。这种方式与传统socket编程一样，需要对网络编程熟悉。

B.在espressif提供的espconn接口的基础上实现网络通信。关于espconn接口api，参考《2C-SDK-Espressif IoT SDK 编程手册_v0.9.5_修正版.pdf》。

6.2具体功能

1.在wifi模块获取IP地址后，开启连接应用服务器任务

2.在连接应用服务器任务中连接到应用服务器端口(端口固定)

3.tcp连接建立后收发消息(消息格式与应用相关，自行添加，本文不进行叙述)

6.3功能实现

说明：TCP通信的实现以开发快的TCP通信为参考，进行适当修改。

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