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AsynchronousvsSynchronous Circuit Design

2008-9-11 09:18:04 4121

0 AsynchronousvsSynchronous Circuit Design Mainly useCombinationalLogic to do the decoding –Address decoder –Fifo/Ram Read or Write pulse ??The output logic does not have any relationship with any clocking signal ??Usually the Decoding Glitch can be monitored at the output signal Usually the circuit design will involve with different kind of Flip-Flop –D type, JK type, RS type or T type ??The output logic is fully control by the rising edge or falling edge of the same clocking signal ??No Glitch will be experienced at the output signal 0qUqDxYt.pdf (325.03 KB, 下载次数: 2 ) 0
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