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`我在使用Quartus II 9.0 Web Edition 进行FPGA编译仿真过程中出现了一下错误,求大神帮忙解答一下。我是Win7 32未系统。不知道这个错误是怎么回事,求大神帮帮忙吧! 信息如下: Info: ******************************************************************* Info: Running Quartus II Analysis & Synthesis Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition Info: Processing started: Wed Dec 30 11:47:09 2015 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off Ram_FIFO -c Ram_FIFO Info: Found 2 design units, including 1 entities, in source file Ram_FIFO.vhd Info: Found design unit 1: Ram_FIFO-behavior_Ram_FIFO Info: Found entity 1: Ram_FIFO Info: Elaborating entity "Ram_FIFO" for the top level hierarchy Info: Found 1 instances of uninferred RAM logic Info: RAM logic "FIFORam" is uninferred due to asynchronous read logic Info: ******************************************************************* Info: Running Quartus II Fitter Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition Info: Processing started: Wed Dec 30 11:47:44 2015 Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off Ram_FIFO -c Ram_FIFO Error: Run Analysis and Synthesis (quartus_map) with top-level entity name "Ram_FIFO" before running Fitter (quartus_fit) Error: Quartus II Fitter was unsuccessful. 1 error, 0 warnings Error: Peak virtual memory: 146 megabytes Error: Processing ended: Wed Dec 30 11:47:45 2015 Error: Elapsed time: 00:00:01 Error: Total CPU time (on all processors): 00:00:00 Error: Quartus II Full Compilation was unsuccessful. 3 errors, 0 warnings 主要是“Error: Peak virtual memory: 146 megabytes”这个错误是什么啊!!!没明白。。。。。求大神解救小弟啊!!都好几天了。。。。 ` |
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同求!!!!!!!!!!!!!!!
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