有关DSPIC33FJ06GS101芯片的实验

2014-11-11 15:28:37 3146

0 实验要求：Fosc接近40MHZ,在OSC1上输出分频的时钟信号，分频比64，PWM频率50KHZ，占空比80%，ADC采样频率10KHZ，随0~3.3VADC输入，占空比在0~100%之间变化（粗略）。芯片相关资料已上传为附件，原程序如下： #include "p33FJ06GS101.h" _FOSCSEL(FNOSC_PRIPLL & IESO_ON); _FOSC(FCKSM_CSDCMD & OSCIOFNC_ON ); _FWDT(FWDTEN_OFF); _FPOR(FPWRT_PWR128); _FICD(ICS_PGD1 & JTAGEN_OFF ); signed long U,I; void init_PWM(void); void ADC_Init(void); int main() { /* Configure Oscillator to operate the device at 40Mhz //Fosc= FinM/(N1N2), Fcy=Fosc/2 /* Configure PLL prescaler, PLL postscaler, PLL divisor / PLLFBD=78; // M=80 CLKDIVbits.PLLPOST=0; // N1=2 CLKDIVbits.PLLPRE=0; // N2=2 __builtin_write_OSCCONH(0x33); / New Oscillator FRC w/ PLL / __builtin_write_OSCCONL(0x00); / Enable Switch / while(OSCCONbits.COSC != 0b011); / Wait for new Oscillator to become FRC w/ PLL COSC<2:0> 011 = 带PLL 的主振荡器（XT、HS 和EC） / while(OSCCONbits.LOCK != 1); ACLKCONbits.FRCSEL = 0; / EX provides input for Auxiliary PLL (x16) / ACLKCONbits.ASRCSEL = 1; ACLKCONbits.SELACLK = 1; / Auxiliary Oscillator provides clock source for PWM & ADC / ACLKCONbits.APSTSCLR = 7; / Divide Auxiliary clock by 1 / ACLKCONbits.ENAPLL = 1; / Enable Auxiliary PLL / while(ACLKCONbits.APLLCK != 1); / Wait for Auxiliary PLL to Lock / init_PWM(); ADC_Init(); / Enable the ADC module early because ADC settling time is about 2us / ADCONbits.ADON = 1; // Enable ADC module while(1); } void init_PWM() { PTPER =25592 ; / 20kHz / / ~~~~~~~~~~~~~~~~~~~~~~ PWM Configuration ~~~~~~~~~~~~~~~~~~~~~~~~~~~ / PWMCON1bits.ITB = 0; //PTPER provides the PWM time. PWMCON1bits.MDCS = 0; IOCON1bits.PENH = 1; / PWM1H is controlled by PWM module / IOCON1bits.PENL = 0; / PWM1L is controlled by PWM module / IOCON1bits.PMOD = 0; / PWM I/O 引脚对处于互补输出模式 / PDC1 = 7678; / Initial Duty cycle 30% / / ~~~~~~~~~~~~~~~~ ADC Trigger Configuration ~~~~~~~~~~~~~~~~~~~~~~~~~~~ / TRGCON1bits.TRGDIV = 0; / Trigger interrupt generated once every 1 PWM cycle / TRGCON1bits.TRGSTRT = 0; / Trigger generated after waiting 0 PWM cycles / TRIG1 =250; PWMCON1bits.DTC = 0; / 对于所有输出模式施加负死区 / DTR1=1024; ALTDTR1=1024; /死区时间为2us/ PTCONbits.PTEN = 1; / Enable the PWM Module / } void ADC_Init(void) { ADCONbits.SLOWCLK = 1; / Requirement from ADC Errata / ADCONbits.FORM = 0; / Output in Integer Format / ADCONbits.EIE = 0; / Disable Early Interrupt / ADCONbits.ORDER = 1; / Even channel first / ADCONbits.SEQSAMP = 0; / Simultaneus Sampling Enabled / ADCONbits.ADCS = 0; / Clock Divider is set up for Fadc/4 / ADSTAT = 0; / Clear the ADSTAT register / ADPCFG = 0; / All except AN10 are analog inputs / ADCPC0bits.TRGSRC0 = 4; / AN0 and AN1 triggered by PWM1 / ADCPC0bits.IRQEN0 = 1; / Global ADC interrupt requested / ADPCFGbits.PCFG0 = 0; / AN0 is inverter current sense / ADPCFGbits.PCFG1 = 0; / AN1 is inverter voltage sense / IPC27bits.ADCP0IP = 1; IFS6bits.ADCP0IF = 0; / Clear AD Interrupt Flag / IEC6bits.ADCP0IE = 1; / Enable the ADC Interrupt at start. / } void __attribute__((interrupt, no_auto_psv)) _ADCP0Interrupt() { ADSTATbits.P0RDY = 0; / Clear ADC pair ready bit / IFS6bits.ADCP0IF = 0; / Clear ADC Interrupt Flag / U=ADCBUF0; I=ADCBUF1; } 请在此基础上修改，或者告知计算方法（部分计算方法已知，但不确定是否这么算），能给详细的计算描述程序修改说明最好！！~~ 0 QQ截图20141111151932.png (86.81 KB, 下载次数: 5)* p33fj06gs101.pdf 2.68 MB , 下载次数: 12 芯片手册
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许子涵 · 2014-11-12 19:26:06 沙发 pcbpp2014 发表于 2014-11-12 09:31 学习了感谢楼主的分享估计没怎么看吧！我是要请人解决问题，不是传播知识！~

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