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大家好，
AMD就不用多介绍了，大家可以搜索百度百科：http://baike.baidu.com/link?url=DIOxjXQ1yWJdaaLgfjv323KfAchelm-sSANQZ9iqpjBI1wZulv5_wDmTM91ZwmyONNm5mbiZglpCceYx26Swyt58eYAYaCVEvGBGXr54G50eOAW_1OyFnK73GEU6nCbf 职位列表如下： 10.MTS/SMTS of Physical Design 11.MTS Design Engineer - DFT 12.Sr./MTS ASIC Design Verification Engineer – Video IP DV 13.Sr./MTS ASIC Design Verification Engineer - SoC DV 14.Sr./MTS Logic Design Engineer 要求如下： 10）.MTS/SMTS of Physical Design Job Requirement: 1. MSEE with 6+ years or Bachelor with 8+ years of industrial experience in ASIC design 2. 5+ years or more years of experience in physical design of deep submicron digital ASIC chips 3. Hands on experience in large scale ASIC chip physical design 4. Knowledgeable in all aspects of deep submicron ASIC design flow 5. Successfully gone through several complete product development cycles 6. Demonstrate strong leadership and work well with cross-functional teams 7. Good listening, writing and speaking English 8. Good communication skills, strong interpersonal skills and the flexibility 9. Dedicated, hard working and good team player 10. Familiar with Back-End (physical design) EDA tools 11. Familiar with Front-End EDA tools is a plus 12. Familiar with Unix/Linux environment and good at scripts 11）.MTS Design Engineer - DFTRequirements/Qualifications: - BS in EE & CS. MS preferred, with 4+ years experience. - Hands on working experience on ASIC DFT design and verification - Familiar with entire ASIC design flow - Experience with micro processor design a big plus - Should have strong problem solving skills - Good English hearing, speaking, reading and writing capabilities - Good communication skills 12）.Sr./MTS ASIC Design Verification Engineer – Video IP DV REQUIREMENTS: - At least 5 years DV experience with good understanding on IP level verification and system level verification; - Deep knowledge of Video coding standards such as AVC, MVC, SVC, HEVC, MPEG4-2, VP8, MPEG-2, VC1 etc is a big plus; - Experience on Security, Memory Controller is preferred; - Experience with current verification methodologies (UVM, OVM, VMM...) - Experience using Perl or other UNIX scripting languages for flow automation - Good understanding on C/C++/Perl/Shell language; - Be fluent in English speaking and writing; 13).Sr./MTS ASIC Design Verification Engineer - SoC DV REQUIREMENTS: - At least 5 years DV experience with good understanding on IP level verification and system level verification; - Good understanding on C/C++/Perl/Shell language; - Have experienced at least 1 complete production cycle; - Be fluent in English speaking and writing - Self motivated; 14).Sr./MTS Logic Design Engineer PREFERRED EXPERIENCE: 1. MSEE with 5+year or BSEE with 8+ years of industry experience in deep submicron ASIC design and verification. 2. Expertise with HDL and design of high speed and high complexity digital logic required 3. Experience with SOC Integration and Place and Route(a plus) 4. Expertise of Computer Architecture and computer Arithmetic (a plus) 5. Expertise of Computer Graphic and HW implementation(a plus) 6. DDR-SDRAM/PCI/PCI-e experience(a plus) 有兴趣的朋友可以发简历到: guohongzhi2012@126.com，现在的职位和薪水都很不错。 
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