esp32-wrover-e + es8388S开发voip对讲，录音噪音偏大音量偏小的问题怎么解决？

模块esp32-wrover-e + es8388S 开发voip对讲，播放声音很好声音清晰没有噪音，

没有说话的时候背景噪音比较大。

但是话筒人说话时距离话筒近一点，声音大一点说话没问题还是比较清晰的，距离远一点声音一下就很小了，不是按距离衰减的。

请问这个芯片录音部分有哪些参数 可以音量增大。灵敏度高一点。



esp_err_t es8388_init(audio_hal_codec_config_t *cfg)

{

    int res = 0;

#ifdef CONFIG_ESP_LYRAT_V4_3_BOARD

   // headphone_detect_init(get_headphone_detect_gpio());

#endif



    res = i2c_init(); // ESP32 in master mode



    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL3, 0x04);  // 0x04 mute/0x00 unmute&ramp;DAC unmute and  disabled digital volume control soft ramp

    /* Chip Control and Power Management */

//    res |= es_write_reg(ES8388_ADDR, ES8388_CONTROL2, 0x50);

    res |= es_write_reg(ES8388_ADDR, ES8388_CONTROL2, 0x00);

    res |= es_write_reg(ES8388_ADDR, ES8388_CHIPPOWER, 0x00); //normal all and power up all



    // Disable the internal DLL to improve 8K sample rate

    res |= es_write_reg(ES8388_ADDR, 0x35, 0xA0);

    res |= es_write_reg(ES8388_ADDR, 0x37, 0xD0);

    res |= es_write_reg(ES8388_ADDR, 0x39, 0xD0);



    res |= es_write_reg(ES8388_ADDR, ES8388_MASTERMODE, cfg->i2s_iface.mode); //CODEC IN I2S SLAVE MODE



    /* dac */

    res |= es_write_reg(ES8388_ADDR, ES8388_DACPOWER, 0xC0);  //disable DAC and disable Lout/Rout/1/2

#ifdef ES8388S

    res |= es_write_reg(ES8388_ADDR, ES8388_CONTROL1, 0x06);  //1001 0010 Enfr=0,Play&Record Mode,(0x17-both of mic&paly)

#else   

    res |= es_write_reg(ES8388_ADDR, ES8388_CONTROL1, 0x12);  //Enfr=0,Play&Record Mode,(0x17-both of mic&paly)

#endif

//    res |= es_write_reg(ES8388_ADDR, ES8388_CONTROL2, 0);  //LPVrefBuf=0,Pdn_ana=0

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL1, 0x18);//1a 0x18:16bit iis , 0x00:24

#ifdef ES8388S

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL2, 0x44);  //DACFsMode,SINGLE SPEED; DACFsRatio,512

#else   

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL2, 0x02);  //DACFsMode,SINGLE SPEED; DACFsRatio,512

#endif

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL16, 0x00); // 0x00 audio on LIN1&RIN1,  0x09 LIN2&RIN2

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL17, 0x90); // only left DAC to left mixer enable 0db

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL20, 0x90); // only right DAC to right mixer enable 0db

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL21, 0x80); //set internal ADC and DAC use the same LRCK clock, ADC LRCK as internal LRCK

    res |= es_write_reg(ES8388_ADDR, ES8388_DACCONTROL23, 0x00);   //vroi=0

    res |= es8388_set_adc_dac_volume(ES_MODULE_DAC, 0, 0);          // 0db  

    int tmp = 0;

    if (AUDIO_HAL_DAC_OUTPUT_LINE2 == cfg->dac_output) {

        tmp = DAC_OUTPUT_LOUT1 | DAC_OUTPUT_ROUT1;

    } else if (AUDIO_HAL_DAC_OUTPUT_LINE1 == cfg->dac_output) {

        tmp = DAC_OUTPUT_LOUT2 | DAC_OUTPUT_ROUT2;

    } else {

        tmp = DAC_OUTPUT_LOUT1 | DAC_OUTPUT_LOUT2 | DAC_OUTPUT_ROUT1 | DAC_OUTPUT_ROUT2;

    }

    res |= es_write_reg(ES8388_ADDR, ES8388_DACPOWER, tmp);  //0x3c Enable DAC and Enable Lout/Rout/1/2

    /* adc */

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCPOWER, 0xFF);

    tmp = 0;

    if (AUDIO_HAL_ADC_INPUT_LINE1 == cfg->adc_input) {

        tmp = ADC_INPUT_LINPUT1_RINPUT1;

    } else if (AUDIO_HAL_ADC_INPUT_LINE2 == cfg->adc_input) {

        tmp = ADC_INPUT_LINPUT2_RINPUT2;

    } else {

        tmp = ADC_INPUT_DIFFERENCE;

    }



    //ALC for Microphone

#ifdef ES8388S

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL1, 0x80); // MIC Left and Right channel PGA gain

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL2, 0xc1);  //0x00 LINSEL & RINSEL, LIN1/RIN1 as ADC Input; DSSEL,use one DS Reg11; DSR, LINPUT1-RINPUT1

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL3, 0x02); //I2S  

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL4, 0x0d); // Left/Right data, Left/Right justified mode, Bits length, I2S format



    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL5, 0x44);  //ADCFsMode,singel SPEED,RATIO=512

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL6, 0x20);  //0010 1100  enable high pass rate , max gain 11,  min gain 00

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL10, 0xfC);  //1111 1000  alc on  max gain PGA 111  min gain PGA 100  12DB

    //res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL11, 0xB5);  //1011 0101   

    //res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL11, 0x51);  //0101 0001  -50dbfs  pga gain  NOISE GATE enable   

    res |= es8388_set_adc_dac_volume(ES_MODULE_ADC, 0, 0);      // 0db  

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCPOWER, 0); //Power on ADC, Enable  ALL //LIN&RIN, Power off MICBIAS, set int1lp to low power mode

#else

   res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL1, 0x88); // MIC Left and Right channel PGA gain

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL2, tmp);  //0x00 LINSEL & RINSEL, LIN1/RIN1 as ADC Input; DSSEL,use one DS Reg11; DSR, LINPUT1-RINPUT1

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL3, 0x02); //I2S  

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL4, 0x0d); // Left/Right data, Left/Right justified mode, Bits length, I2S format

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCCONTROL5, 0x02);  //ADCFsMode,singel SPEED,RATIO=128

    res |= es8388_set_adc_dac_volume(ES_MODULE_ADC, 0, 0);      // 0db

    res |= es_write_reg(ES8388_ADDR, ES8388_ADCPOWER, 0x09); //Power on ADC, Enable  ALL //LIN&RIN, Power off MICBIAS, set int1lp to low power mode

#endif

    /* enable es8388 PA */

   // es8388_pa_power(true); //自己主板需要屏蔽的

    ESP_LOGI(ES_TAG, "init,out:%02x, in:%02x", cfg->dac_output, cfg->adc_input);

    return res;

}